Commit 2197cf70 authored by Nicolas Ferre's avatar Nicolas Ferre
Browse files

Merge tag 'at91-cleanup2' into at91-4.1-multiplatform

Second batch of cleanup for 4.1:
- remove unused matrix header files
- dbgu + chip identification: new driver for SoC detection
  this allow to remove all additional io mapping
- remove old non-standard AT91 setup code
parents 8e6de970 598e0855
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* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)

Required properties:
- compatible: Should be "atmel,<chip>-usart"
- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
  The compatible <chip> indicated will be the first SoC to support an
  additional mode or an USART new feature.
  For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
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@@ -361,9 +361,9 @@ config ARCH_AT91
	select ARCH_REQUIRE_GPIOLIB
	select CLKDEV_LOOKUP
	select IRQ_DOMAIN
	select NEED_MACH_IO_H if PCCARD
	select PINCTRL
	select PINCTRL_AT91
	select SOC_BUS
	select USE_OF
	help
	  This enables support for systems based on Atmel
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@@ -830,7 +830,7 @@
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91rm9200-usart";
				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
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@@ -753,7 +753,7 @@
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
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@@ -276,7 +276,7 @@
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
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