Commit 216d56c5 authored by Vinay Belgaumkar's avatar Vinay Belgaumkar Committed by John Harrison
Browse files

drm/i915/guc/rc: Setup and enable GuCRC feature 



This feature hands over the control of HW RC6 to the GuC.
GuC decides when to put HW into RC6 based on it's internal
busyness algorithms.

GuCRC needs GuC submission to be enabled, and only
supported on Gen12+ for now.

When GuCRC is enabled, do not set HW RC6. Use a H2G message
to tell GuC to enable GuCRC. When disabling RC6, tell GuC to
revert RC6 control back to KMD. KMD is still responsible for
enabling everything related to Coarse Power Gating though.

v2: Address comments (Michal W)
v3: Don't set hysterisis values when GuCRC is used (Matt Roper)
v4: checkpatch()

Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210730202119.23810-15-vinay.belgaumkar@intel.com
parent 8ee2c227

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -186,6 +186,7 @@ i915-y += gt/uc/intel_uc.o \ 
	  gt/uc/intel_guc_fw.o \

	  gt/uc/intel_guc_log.o \

	  gt/uc/intel_guc_log_debugfs.o \

	  gt/uc/intel_guc_rc.o \

	  gt/uc/intel_guc_slpc.o \

	  gt/uc/intel_guc_submission.o \

	  gt/uc/intel_huc.o \

drivers/gpu/drm/i915/gt/intel_rc6.c

+32 −15
Original line number Diff line number Diff line
@@ -62,6 +62,10 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6) 
	u32 pg_enable;

	int i;



	/*

	 * With GuCRC, these parameters are set by GuC

	 */

	if (!intel_uc_uses_guc_rc(&gt->uc)) {

		/* 2b: Program RC6 thresholds.*/

		set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);

		set(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
@@ -76,6 +80,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6) 
		set(uncore, GEN6_RC_SLEEP, 0);



		set(uncore, GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */

	}



	/*

	 * 2c: Program Coarse Power Gating Policies.
@@ -98,7 +103,15 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6) 
	set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);

	set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);



	/* 3a: Enable RC6 */

	/* 3a: Enable RC6

	 *

	 * With GuCRC, we do not enable bit 31 of RC_CTL,

	 * thus allowing GuC to control RC6 entry/exit fully instead.

	 * We will not set the HW ENABLE and EI bits

	 */

	if (!intel_guc_rc_enable(&gt->uc.guc))

		rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;

	else

		rc6->ctl_enable =

			GEN6_RC_CTL_HW_ENABLE |

			GEN6_RC_CTL_RC6_ENABLE |
@@ -513,6 +526,10 @@ static void __intel_rc6_disable(struct intel_rc6 *rc6) 
{

	struct drm_i915_private *i915 = rc6_to_i915(rc6);

	struct intel_uncore *uncore = rc6_to_uncore(rc6);

	struct intel_gt *gt = rc6_to_gt(rc6);



	/* Take control of RC6 back from GuC */

	intel_guc_rc_disable(&gt->uc.guc);



	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);

	if (GRAPHICS_VER(i915) >= 9)

drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h

+6 −0
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ enum intel_guc_action { 
	INTEL_GUC_ACTION_SET_CONTEXT_PREEMPTION_TIMEOUT = 0x1007,

	INTEL_GUC_ACTION_CONTEXT_RESET_NOTIFICATION = 0x1008,

	INTEL_GUC_ACTION_ENGINE_FAILURE_NOTIFICATION = 0x1009,

	INTEL_GUC_ACTION_SETUP_PC_GUCRC = 0x3004,

	INTEL_GUC_ACTION_AUTHENTICATE_HUC = 0x4000,

	INTEL_GUC_ACTION_REGISTER_CONTEXT = 0x4502,

	INTEL_GUC_ACTION_DEREGISTER_CONTEXT = 0x4503,
@@ -145,6 +146,11 @@ enum intel_guc_action { 
	INTEL_GUC_ACTION_LIMIT

};



enum intel_guc_rc_options {

	INTEL_GUCRC_HOST_CONTROL,

	INTEL_GUCRC_FIRMWARE_CONTROL,

};



enum intel_guc_preempt_options {

	INTEL_GUC_PREEMPT_OPTION_DROP_WORK_Q = 0x4,

	INTEL_GUC_PREEMPT_OPTION_DROP_SUBMIT_Q = 0x8,

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+1 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ void intel_guc_init_early(struct intel_guc *guc) 
	intel_guc_log_init_early(&guc->log);

	intel_guc_submission_init_early(guc);

	intel_guc_slpc_init_early(&guc->slpc);

	intel_guc_rc_init_early(guc);



	mutex_init(&guc->send_mutex);

	spin_lock_init(&guc->irq_lock);

drivers/gpu/drm/i915/gt/uc/intel_guc.h

+2 −0
Original line number Diff line number Diff line
@@ -59,6 +59,8 @@ struct intel_guc { 


	bool submission_supported;

	bool submission_selected;

	bool rc_supported;

	bool rc_selected;



	struct i915_vma *ads_vma;

	struct __guc_ads_blob *ads_blob;