Commit 20ec0aa8 authored by Hao Lan's avatar Hao Lan Committed by Zheng Zengkai
Browse files

net: hns3: add querying and setting fec llrs mode from firmware 

mainline inclusion
from mainline-v6.0-rc2
commit 5c4f7284
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5QIIF
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5c4f72842d1d



----------------------------------------------------------------------

This patch supports llrs fec mode in speed 200G for some new devices, and
suppoprts querying llrs fec ability from firmware.

Signed-off-by: default avatarHao Lan <lanhao@huawei.com>
Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarJiantao Xiao <xiaojiantao1@h-partners.com>
Reviewed-by: default avatarJian Shen <shenjian15@huawei.com>
Reviewed-by: default avatarYueHaibing <yuehaibing@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 5538b273

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+1 −0
Original line number Diff line number Diff line
@@ -222,6 +222,7 @@ enum hnae3_fec_mode { 
	HNAE3_FEC_AUTO = 0,

	HNAE3_FEC_BASER,

	HNAE3_FEC_RS,

	HNAE3_FEC_LLRS,

	HNAE3_FEC_USER_DEF,

};

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c

+1 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ int hclge_comm_firmware_compat_config(struct hnae3_ae_dev *ae_dev, 
			hnae3_set_bit(compat, HCLGE_COMM_PHY_IMP_EN_B, 1);

		hnae3_set_bit(compat, HCLGE_COMM_MAC_STATS_EXT_EN_B, 1);

		hnae3_set_bit(compat, HCLGE_COMM_SYNC_RX_RING_HEAD_EN_B, 1);

		hnae3_set_bit(compat, HCLGE_COMM_LLRS_FEC_EN_B, 1);



		req->compat = cpu_to_le32(compat);

	}

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#define HCLGE_COMM_PHY_IMP_EN_B			2

#define HCLGE_COMM_MAC_STATS_EXT_EN_B		3

#define HCLGE_COMM_SYNC_RX_RING_HEAD_EN_B	4

#define HCLGE_COMM_LLRS_FEC_EN_B		5



#define hclge_comm_dev_phy_imp_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (ae_dev)->caps)

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+4 −0
Original line number Diff line number Diff line
@@ -1608,6 +1608,8 @@ static unsigned int loc_to_eth_fec(u8 loc_fec) 
		eth_fec |= ETHTOOL_FEC_AUTO;

	if (loc_fec & BIT(HNAE3_FEC_RS))

		eth_fec |= ETHTOOL_FEC_RS;

	if (loc_fec & BIT(HNAE3_FEC_LLRS))

		eth_fec |= ETHTOOL_FEC_LLRS;

	if (loc_fec & BIT(HNAE3_FEC_BASER))

		eth_fec |= ETHTOOL_FEC_BASER;
@@ -1630,6 +1632,8 @@ static unsigned int eth_to_loc_fec(unsigned int eth_fec) 
		loc_fec |= BIT(HNAE3_FEC_AUTO);

	if (eth_fec & ETHTOOL_FEC_RS)

		loc_fec |= BIT(HNAE3_FEC_RS);

	if (eth_fec & ETHTOOL_FEC_LLRS)

		loc_fec |= BIT(HNAE3_FEC_LLRS);

	if (eth_fec & ETHTOOL_FEC_BASER)

		loc_fec |= BIT(HNAE3_FEC_BASER);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -360,6 +360,7 @@ struct hclge_sfp_info_cmd { 
#define HCLGE_MAC_FEC_OFF		0

#define HCLGE_MAC_FEC_BASER		1

#define HCLGE_MAC_FEC_RS		2

#define HCLGE_MAC_FEC_LLRS		3

struct hclge_config_fec_cmd {

	u8 fec_mode;

	u8 default_config;