Commit 20e1d75b authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs 



The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.

Fixes: 4a66e76f ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230725-topic-8280_dispcc_gdsc-v1-1-236590060531@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent a9f71a03

drivers/clk/qcom/dispcc-sc8280xp.c

+4 −4
Original line number Diff line number Diff line
@@ -3057,7 +3057,7 @@ static struct gdsc disp0_mdss_gdsc = { 
		.name = "disp0_mdss_gdsc",

	},

	.pwrsts = PWRSTS_OFF_ON,

	.flags = HW_CTRL,

	.flags = HW_CTRL | RETAIN_FF_ENABLE,

};



static struct gdsc disp1_mdss_gdsc = {
@@ -3069,7 +3069,7 @@ static struct gdsc disp1_mdss_gdsc = { 
		.name = "disp1_mdss_gdsc",

	},

	.pwrsts = PWRSTS_OFF_ON,

	.flags = HW_CTRL,

	.flags = HW_CTRL | RETAIN_FF_ENABLE,

};



static struct gdsc disp0_mdss_int2_gdsc = {
@@ -3081,7 +3081,7 @@ static struct gdsc disp0_mdss_int2_gdsc = { 
		.name = "disp0_mdss_int2_gdsc",

	},

	.pwrsts = PWRSTS_OFF_ON,

	.flags = HW_CTRL,

	.flags = HW_CTRL | RETAIN_FF_ENABLE,

};



static struct gdsc disp1_mdss_int2_gdsc = {
@@ -3093,7 +3093,7 @@ static struct gdsc disp1_mdss_int2_gdsc = { 
		.name = "disp1_mdss_int2_gdsc",

	},

	.pwrsts = PWRSTS_OFF_ON,

	.flags = HW_CTRL,

	.flags = HW_CTRL | RETAIN_FF_ENABLE,

};



static struct gdsc *disp0_cc_sc8280xp_gdscs[] = {