Commit 205b3d02 authored by Sumit Gupta's avatar Sumit Gupta Committed by Thierry Reding
Browse files

PCI: tegra194: Fix possible array out of bounds access 



Add check to fix the possible array out of bounds violation by
making speed equal to GEN1_CORE_CLK_FREQ when its value is more
than the size of "pcie_gen_freq" array. This array has size of
four but possible speed (CLS) values are from "0 to 0xF". So,
"speed - 1" values are "-1 to 0xE".

Suggested-by: default avatarBjorn Helgaas <helgaas@kernel.org>
Signed-off-by: default avatarSumit Gupta <sumitg@nvidia.com>
Link: https://lore.kernel.org/lkml/72b9168b-d4d6-4312-32ea-69358df2f2d0@nvidia.com/


Acked-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 9422644d

drivers/pci/controller/dwc/pcie-tegra194.c

+11 −2
Original line number Diff line number Diff line
@@ -223,6 +223,7 @@ 
#define EP_STATE_ENABLED	1



static const unsigned int pcie_gen_freq[] = {

	GEN1_CORE_CLK_FREQ,	/* PCI_EXP_LNKSTA_CLS == 0; undefined */

	GEN1_CORE_CLK_FREQ,

	GEN2_CORE_CLK_FREQ,

	GEN3_CORE_CLK_FREQ,
@@ -459,7 +460,11 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg) 


	speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) &

		PCI_EXP_LNKSTA_CLS;

	clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]);



	if (speed >= ARRAY_SIZE(pcie_gen_freq))

		speed = 0;



	clk_set_rate(pcie->core_clk, pcie_gen_freq[speed]);



	if (pcie->of_data->has_ltr_req_fix)

		return IRQ_HANDLED;
@@ -1020,7 +1025,11 @@ static int tegra_pcie_dw_start_link(struct dw_pcie *pci) 


	speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) &

		PCI_EXP_LNKSTA_CLS;

	clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]);



	if (speed >= ARRAY_SIZE(pcie_gen_freq))

		speed = 0;



	clk_set_rate(pcie->core_clk, pcie_gen_freq[speed]);



	tegra_pcie_enable_interrupts(pp);