Commit 203bcac9 authored by Sung Joon Kim's avatar Sung Joon Kim Committed by Alex Deucher
Browse files

drm/amd/display: increasing DRAM BW percent for DCN315 



[why]
DML validation fails when we connect two or
more displays with HDR. Need to increase
DRAM BW to make the validation passing.
Following the value from DCN31.

[how]
Change the max DRAM BW DML field to 60%.

Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarSung Joon Kim <sungkim@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b51178d6

drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -273,7 +273,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = { 
	.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm = 60.0,

	.pct_ideal_dram_sdp_bw_after_urgent_vm_only = 30.0,

	.max_avg_sdp_bw_use_normal_percent = 60.0,

	.max_avg_dram_bw_use_normal_percent = 30.0,

	.max_avg_dram_bw_use_normal_percent = 60.0,

	.fabric_datapath_to_dcn_data_return_bytes = 32,

	.return_bus_width_bytes = 64,

	.downspread_percent = 0.38,