Commit 20300099 authored by Wanpeng Li's avatar Wanpeng Li Committed by Paolo Bonzini
Browse files

kvm: vmx: add MSR logic for XSAVES 



Add logic to get/set the XSS model-specific register.

Signed-off-by: default avatarWanpeng Li <wanpeng.li@linux.intel.com>
Reviewed-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent f53cd63c

arch/x86/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -362,6 +362,7 @@ struct kvm_vcpu_arch { 
	int mp_state;

	u64 ia32_misc_enable_msr;

	bool tpr_access_reporting;

	u64 ia32_xss;



	/*

	 * Paging state of the vcpu

arch/x86/kvm/vmx.c

+28 −1
Original line number Diff line number Diff line
@@ -99,6 +99,8 @@ module_param_named(enable_shadow_vmcs, enable_shadow_vmcs, bool, S_IRUGO); 
static bool __read_mostly nested = 0;

module_param(nested, bool, S_IRUGO);



static u64 __read_mostly host_xss;



#define KVM_GUEST_CR0_MASK (X86_CR0_NW | X86_CR0_CD)

#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST (X86_CR0_WP | X86_CR0_NE)

#define KVM_VM_CR0_ALWAYS_ON						\
@@ -2570,6 +2572,11 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) 
		if (!nested_vmx_allowed(vcpu))

			return 1;

		return vmx_get_vmx_msr(vcpu, msr_index, pdata);

	case MSR_IA32_XSS:

		if (!vmx_xsaves_supported())

			return 1;

		data = vcpu->arch.ia32_xss;

		break;

	case MSR_TSC_AUX:

		if (!to_vmx(vcpu)->rdtscp_enabled)

			return 1;
@@ -2661,6 +2668,22 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		break;

	case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:

		return 1; /* they are read-only */

	case MSR_IA32_XSS:

		if (!vmx_xsaves_supported())

			return 1;

		/*

		 * The only supported bit as of Skylake is bit 8, but

		 * it is not supported on KVM.

		 */

		if (data != 0)

			return 1;

		vcpu->arch.ia32_xss = data;

		if (vcpu->arch.ia32_xss != host_xss)

			add_atomic_switch_msr(vmx, MSR_IA32_XSS,

				vcpu->arch.ia32_xss, host_xss);

		else

			clear_atomic_switch_msr(vmx, MSR_IA32_XSS);

		break;

	case MSR_TSC_AUX:

		if (!vmx->rdtscp_enabled)

			return 1;
@@ -2896,7 +2919,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) 
			SECONDARY_EXEC_ENABLE_INVPCID |

			SECONDARY_EXEC_APIC_REGISTER_VIRT |

			SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |

			SECONDARY_EXEC_SHADOW_VMCS;

			SECONDARY_EXEC_SHADOW_VMCS |

			SECONDARY_EXEC_XSAVES;

		if (adjust_vmx_controls(min2, opt2,

					MSR_IA32_VMX_PROCBASED_CTLS2,

					&_cpu_based_2nd_exec_control) < 0)
@@ -3019,6 +3043,9 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) 
		}

	}



	if (cpu_has_xsaves)

		rdmsrl(MSR_IA32_XSS, host_xss);



	return 0;

}