Commit 201f1a2d authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue 

Maciej Machnikowski says:

====================
100GbE Intel Wired LAN Driver Updates 2021-10-14

Extend the driver implementation to support PTP pins on E810-T
and derivative devices.

E810-T adapters are equipped with:
- 2 external bidirectional SMA connectors
- 1 internal TX U.FL shared with SMA1
- 1 internal RX U.FL shared with SMA2

The SMA and U.FL configuration is controlled by the external
multiplexer.

E810-T Derivatives are equipped with:
- 2 1PPS outputs on SDP20 and SDP22
- 2 1PPS inputs on SDP21 and SDP23
====================

Link: https://lore.kernel.org/r/20211014153531.2908804-1-anthony.l.nguyen@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 9974cb5c 325b2064

drivers/net/ethernet/intel/ice/ice.h

+1 −0
Original line number Diff line number Diff line
@@ -163,6 +163,7 @@ 


enum ice_feature {

	ICE_F_DSCP,

	ICE_F_SMA_CTRL,

	ICE_F_MAX

};

drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

+19 −1
Original line number Diff line number Diff line
@@ -1279,7 +1279,7 @@ struct ice_aqc_set_mac_lb { 
	u8 reserved[15];

};



struct ice_aqc_link_topo_addr {

struct ice_aqc_link_topo_params {

	u8 lport_num;

	u8 lport_num_valid;

#define ICE_AQC_LINK_TOPO_PORT_NUM_VALID	BIT(0)
@@ -1305,6 +1305,10 @@ struct ice_aqc_link_topo_addr { 
#define ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED	4

#define ICE_AQC_LINK_TOPO_NODE_CTX_OVERRIDE	5

	u8 index;

};



struct ice_aqc_link_topo_addr {

	struct ice_aqc_link_topo_params topo_params;

	__le16 handle;

#define ICE_AQC_LINK_TOPO_HANDLE_S	0

#define ICE_AQC_LINK_TOPO_HANDLE_M	(0x3FF << ICE_AQC_LINK_TOPO_HANDLE_S)
@@ -1327,6 +1331,7 @@ struct ice_aqc_link_topo_addr { 
struct ice_aqc_get_link_topo {

	struct ice_aqc_link_topo_addr addr;

	u8 node_part_num;

#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575	0x21

	u8 rsvd[9];

};
@@ -1340,6 +1345,16 @@ struct ice_aqc_set_port_id_led { 
	u8 rsvd[13];

};



/* Set/Get GPIO (direct, 0x06EC/0x06ED) */

struct ice_aqc_gpio {

	__le16 gpio_ctrl_handle;

#define ICE_AQC_GPIO_HANDLE_S	0

#define ICE_AQC_GPIO_HANDLE_M	(0x3FF << ICE_AQC_GPIO_HANDLE_S)

	u8 gpio_num;

	u8 gpio_val;

	u8 rsvd[12];

};



/* Read/Write SFF EEPROM command (indirect 0x06EE) */

struct ice_aqc_sff_eeprom {

	u8 lport_num;
@@ -1981,6 +1996,7 @@ struct ice_aq_desc { 
		struct ice_aqc_get_phy_caps get_phy;

		struct ice_aqc_set_phy_cfg set_phy;

		struct ice_aqc_restart_an restart_an;

		struct ice_aqc_gpio read_write_gpio;

		struct ice_aqc_sff_eeprom read_write_sff_param;

		struct ice_aqc_set_port_id_led set_port_id_led;

		struct ice_aqc_get_sw_cfg get_sw_conf;
@@ -2136,6 +2152,8 @@ enum ice_adminq_opc { 
	ice_aqc_opc_set_mac_lb				= 0x0620,

	ice_aqc_opc_get_link_topo			= 0x06E0,

	ice_aqc_opc_set_port_id_led			= 0x06E9,

	ice_aqc_opc_set_gpio				= 0x06EC,

	ice_aqc_opc_get_gpio				= 0x06ED,

	ice_aqc_opc_sff_eeprom				= 0x06EE,



	/* NVM commands */

drivers/net/ethernet/intel/ice/ice_common.c

+84 −3
Original line number Diff line number Diff line
@@ -69,6 +69,27 @@ bool ice_is_e810(struct ice_hw *hw) 
	return hw->mac_type == ICE_MAC_E810;

}



/**

 * ice_is_e810t

 * @hw: pointer to the hardware structure

 *

 * returns true if the device is E810T based, false if not.

 */

bool ice_is_e810t(struct ice_hw *hw)

{

	switch (hw->device_id) {

	case ICE_DEV_ID_E810C_SFP:

		if (hw->subsystem_device_id == ICE_SUBDEV_ID_E810T ||

		    hw->subsystem_device_id == ICE_SUBDEV_ID_E810T2)

			return true;

		break;

	default:

		break;

	}



	return false;

}



/**

 * ice_clear_pf_cfg - Clear PF configuration

 * @hw: pointer to the hardware structure
@@ -240,11 +261,13 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, 


	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);



	cmd->addr.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PORT <<

	cmd->addr.topo_params.node_type_ctx =

		(ICE_AQC_LINK_TOPO_NODE_CTX_PORT <<

		 ICE_AQC_LINK_TOPO_NODE_CTX_S);



	/* set node type */

	cmd->addr.node_type_ctx |= (ICE_AQC_LINK_TOPO_NODE_TYPE_M & node_type);

	cmd->addr.topo_params.node_type_ctx |=

		(ICE_AQC_LINK_TOPO_NODE_TYPE_M & node_type);



	return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);

}
@@ -4792,6 +4815,64 @@ ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 
	return 0;

}



/**

 * ice_aq_set_gpio

 * @hw: pointer to the hw struct

 * @gpio_ctrl_handle: GPIO controller node handle

 * @pin_idx: IO Number of the GPIO that needs to be set

 * @value: SW provide IO value to set in the LSB

 * @cd: pointer to command details structure or NULL

 *

 * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology

 */

int

ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,

		struct ice_sq_cd *cd)

{

	struct ice_aqc_gpio *cmd;

	struct ice_aq_desc desc;



	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);

	cmd = &desc.params.read_write_gpio;

	cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);

	cmd->gpio_num = pin_idx;

	cmd->gpio_val = value ? 1 : 0;



	return ice_status_to_errno(ice_aq_send_cmd(hw, &desc, NULL, 0, cd));

}



/**

 * ice_aq_get_gpio

 * @hw: pointer to the hw struct

 * @gpio_ctrl_handle: GPIO controller node handle

 * @pin_idx: IO Number of the GPIO that needs to be set

 * @value: IO value read

 * @cd: pointer to command details structure or NULL

 *

 * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of

 * the topology

 */

int

ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

		bool *value, struct ice_sq_cd *cd)

{

	struct ice_aqc_gpio *cmd;

	struct ice_aq_desc desc;

	enum ice_status status;



	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);

	cmd = &desc.params.read_write_gpio;

	cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);

	cmd->gpio_num = pin_idx;



	status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

	if (status)

		return ice_status_to_errno(status);



	*value = !!cmd->gpio_val;

	return 0;

}



/**

 * ice_fw_supports_link_override

 * @hw: pointer to the hardware structure

drivers/net/ethernet/intel/ice/ice_common.h

+7 −0
Original line number Diff line number Diff line
@@ -183,6 +183,7 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 
void

ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

		  u64 *prev_stat, u64 *cur_stat);

bool ice_is_e810t(struct ice_hw *hw);

enum ice_status

ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,

		     struct ice_aqc_txsched_elem_data *buf);
@@ -192,6 +193,12 @@ ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 
int

ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,

			u32 *value, struct ice_sq_cd *cd);

int

ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,

		struct ice_sq_cd *cd);

int

ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

		bool *value, struct ice_sq_cd *cd);

enum ice_status

ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,

		    struct ice_sq_cd *cd);

drivers/net/ethernet/intel/ice/ice_devids.h

+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ 
#define ICE_DEV_ID_E810C_QSFP		0x1592

/* Intel(R) Ethernet Controller E810-C for SFP */

#define ICE_DEV_ID_E810C_SFP		0x1593

#define ICE_SUBDEV_ID_E810T		0x000E

#define ICE_SUBDEV_ID_E810T2		0x000F

/* Intel(R) Ethernet Controller E810-XXV for SFP */

#define ICE_DEV_ID_E810_XXV_SFP		0x159B

/* Intel(R) Ethernet Connection E823-C for backplane */