Commit 2019295c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi updates from Mark Brown:
 "This is quite a quiet release for SPI, there's been a bit of cleanup
  to the core from Uwe but nothing functionality wise.

  We have added several new drivers, Cadence XSPI, Ingenic JZ47xx,
  Qualcomm SC7280 and SC7180 and Xilinx Versal OSPI"

* tag 'spi-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (41 commits)
  spi: Convert NXP flexspi to json schema
  spi: spi-geni-qcom: Add support for GPI dma
  spi: fsi: Fix contention in the FSI2SPI engine
  spi: spi-rpc-if: Check return value of rpcif_sw_init()
  spi: tegra210-quad: Put device into suspend on driver removal
  spi: tegra20-slink: Put device into suspend on driver removal
  spi: bcm-qspi: Fix missing clk_disable_unprepare() on error in bcm_qspi_probe()
  spi: at91-usart: replacing legacy gpio interface for gpiod
  spi: replace snprintf in show functions with sysfs_emit
  spi: cadence: Add of_node_put() before return
  spi: orion: Add of_node_put() before goto
  spi: cadence-quadspi: fix dma_unmap_single() call
  spi: tegra20: fix build with CONFIG_PM_SLEEP=n
  spi: bcm-qspi: add support for 3-wire mode for half duplex transfer
  spi: bcm-qspi: Add mspi spcr3 32/64-bits xfer mode
  spi: Make several public functions private to spi.c
  spi: Reorder functions to simplify the next commit
  spi: Remove unused function spi_busnum_to_master()
  spi: Move comment about chipselect check to the right place
  spi: fsi: Print status on error
  ...
parents 1260d242 28b5eaf9

Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

+12 −0
Original line number Diff line number Diff line
@@ -11,6 +11,14 @@ maintainers: 


allOf:

  - $ref: spi-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: xlnx,versal-ospi-1.0

    then:

      required:

        - power-domains



properties:

  compatible:
@@ -20,6 +28,7 @@ properties: 
              - ti,k2g-qspi

              - ti,am654-ospi

              - intel,lgm-qspi

              - xlnx,versal-ospi-1.0

          - const: cdns,qspi-nor

      - const: cdns,qspi-nor
@@ -65,6 +74,9 @@ properties: 
      data rather than the QSPI clock. Make sure that QSPI return clock

      is populated on the board before using this property.



  power-domains:

    maxItems: 1



  resets:

    maxItems: 2

Documentation/devicetree/bindings/spi/cdns,xspi.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2020-21 Cadence

%YAML 1.2

---

$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Cadence XSPI Controller



maintainers:

  - Parshuram Thombare <pthombar@cadence.com>



description: |

  The XSPI controller allows SPI protocol communication in

  single, dual, quad or octal wire transmission modes for

  read/write access to slaves such as SPI-NOR flash.



allOf:

  - $ref: "spi-controller.yaml#"



properties:

  compatible:

    const: cdns,xspi-nor



  reg:

    items:

      - description: address and length of the controller register set

      - description: address and length of the Slave DMA data port

      - description: address and length of the auxiliary registers



  reg-names:

    items:

      - const: io

      - const: sdma

      - const: aux



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    bus {

        #address-cells = <2>;

        #size-cells = <2>;



        xspi: spi@a0010000 {

            #address-cells = <1>;

            #size-cells = <0>;

            compatible = "cdns,xspi-nor";

            reg = <0x0 0xa0010000 0x0 0x1040>,

                  <0x0 0xb0000000 0x0 0x1000>,

                  <0x0 0xa0020000 0x0 0x100>;

            reg-names = "io", "sdma", "aux";

            interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-parent = <&gic>;



            flash@0 {

                compatible = "jedec,spi-nor";

                spi-max-frequency = <75000000>;

                reg = <0>;

            };



            flash@1 {

                compatible = "jedec,spi-nor";

                spi-max-frequency = <75000000>;

                reg = <1>;

            };

        };

    };

Documentation/devicetree/bindings/spi/ingenic,spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Ingenic SoCs SPI controller devicetree bindings



maintainers:

  - Artur Rojek <contact@artur-rojek.eu>

  - Paul Cercueil <paul@crapouillou.net>



allOf:

  - $ref: /schemas/spi/spi-controller.yaml#



properties:

  compatible:

    oneOf:

      - enum:

          - ingenic,jz4750-spi

          - ingenic,jz4780-spi

      - items:

          - enum:

              - ingenic,jz4760-spi

              - ingenic,jz4770-spi

          - const: ingenic,jz4750-spi



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  dmas:

    maxItems: 2

    minItems: 2



  dma-names:

    items:

      - const: rx

      - const: tx



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - dmas

  - dma-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/jz4770-cgu.h>

    spi@10043000 {

      compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";

      reg = <0x10043000 0x1c>;

      #address-cells = <1>;

      #size-cells = <0>;



      interrupt-parent = <&intc>;

      interrupts = <8>;



      clocks = <&cgu JZ4770_CLK_SSI0>;



      dmas = <&dmac1 23 0xffffffff>, <&dmac1 22 0xffffffff>;

      dma-names = "rx", "tx";

    };

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml

+5 −1
Original line number Diff line number Diff line
@@ -21,7 +21,11 @@ allOf: 
properties:

  compatible:

    items:

      - const: qcom,sdm845-qspi

      - enum:

          - qcom,sc7180-qspi

          - qcom,sc7280-qspi

          - qcom,sdm845-qspi



      - const: qcom,qspi-v1



  reg:

Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt

deleted100644 → 0
+0 −44
Original line number Diff line number Diff line 
* NXP Flex Serial Peripheral Interface (FSPI)



Required properties:

  - compatible : Should be "nxp,lx2160a-fspi"

			    "nxp,imx8qxp-fspi"

			    "nxp,imx8mm-fspi"

			    "nxp,imx8mp-fspi"

			    "nxp,imx8dxl-fspi"



  - reg :        First contains the register location and length,

                 Second contains the memory mapping address and length

  - reg-names :  Should contain the resource reg names:

	         - fspi_base: configuration register address space

                 - fspi_mmap: memory mapped address space

  - interrupts : Should contain the interrupt for the device



Required SPI slave node properties:

  - reg :        There are two buses (A and B) with two chip selects each.

                 This encodes to which bus and CS the flash is connected:

                 - <0>: Bus A, CS 0

                 - <1>: Bus A, CS 1

                 - <2>: Bus B, CS 0

                 - <3>: Bus B, CS 1



Example showing the usage of two SPI NOR slave devices on bus A:



fspi0: spi@20c0000 {

	compatible = "nxp,lx2160a-fspi";

	reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>;

	reg-names = "fspi_base", "fspi_mmap";

	interrupts = <0 25 0x4>; /* Level high type */

	clocks = <&clockgen 4 3>, <&clockgen 4 3>;

	clock-names = "fspi_en", "fspi";



	mt35xu512aba0: flash@0 {

		reg = <0>;

		....

	};



	mt35xu512aba1: flash@1 {

		reg = <1>;

		....

	};

};