Commit 20174900 authored by Amit Cohen's avatar Amit Cohen Committed by David S. Miller
Browse files

mlxsw: reg: Add Tunneling IPinIP Encapsulation ECN Mapping Register 



This register performs mapping from overlay ECN to underlay ECN during
IPinIP encapsulation.

Signed-off-by: default avatarAmit Cohen <amitc@mellanox.com>
Acked-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 196442ec

drivers/net/ethernet/mellanox/mlxsw/reg.h

+31 −0
Original line number Diff line number Diff line
@@ -10140,6 +10140,36 @@ static inline void mlxsw_reg_tigcr_pack(char *payload, bool ttlc, u8 ttl_uc) 
	mlxsw_reg_tigcr_ttl_uc_set(payload, ttl_uc);

}



/* TIEEM - Tunneling IPinIP Encapsulation ECN Mapping Register

 * -----------------------------------------------------------

 * The TIEEM register maps ECN of the IP header at the ingress to the

 * encapsulation to the ECN of the underlay network.

 */

#define MLXSW_REG_TIEEM_ID 0xA812

#define MLXSW_REG_TIEEM_LEN 0x0C



MLXSW_REG_DEFINE(tieem, MLXSW_REG_TIEEM_ID, MLXSW_REG_TIEEM_LEN);



/* reg_tieem_overlay_ecn

 * ECN of the IP header in the overlay network.

 * Access: Index

 */

MLXSW_ITEM32(reg, tieem, overlay_ecn, 0x04, 24, 2);



/* reg_tineem_underlay_ecn

 * ECN of the IP header in the underlay network.

 * Access: RW

 */

MLXSW_ITEM32(reg, tieem, underlay_ecn, 0x04, 16, 2);



static inline void mlxsw_reg_tieem_pack(char *payload, u8 overlay_ecn,

					u8 underlay_ecn)

{

	MLXSW_REG_ZERO(tieem, payload);

	mlxsw_reg_tieem_overlay_ecn_set(payload, overlay_ecn);

	mlxsw_reg_tieem_underlay_ecn_set(payload, underlay_ecn);

}



/* SBPR - Shared Buffer Pools Register

 * -----------------------------------

 * The SBPR configures and retrieves the shared buffer pools and configuration.
@@ -10684,6 +10714,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { 
	MLXSW_REG(tndem),

	MLXSW_REG(tnpc),

	MLXSW_REG(tigcr),

	MLXSW_REG(tieem),

	MLXSW_REG(sbpr),

	MLXSW_REG(sbcm),

	MLXSW_REG(sbpm),