Commit 1ff1da40 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu',... 


Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', 'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi', 'msm-next-lumag-mdp5' and 'msm-next-lumag-mdp4' into msm-next-lumag

Changes in this merge:
Core:
- client utilization via fdinfo support
- fix fence rollover issue

DPU:
- constification of HW catalog
- support for using encoder as CRC source
- WB support on sc7180
- WB resolution fixes
- enable DSPP support for sc7280

DP:
- dropped custom bulk clock implementation
- made dp_bridge_mode_valid() return MODE_CLOCK_HIGH where applicable
- fix link retraining on resolution change

MDP5:
- MSM8953 perf data

HDMI:
- YAML'ification of schema
- dropped obsolete GPIO support
- misc cleanups

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parents 2311720a fca5ad26 94a9e052 4f0718bf a7977d5c eeda2bc4 97b10e15

Documentation/devicetree/bindings/display/msm/dp-controller.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: MSM Display Port Controller



maintainers:

  - Kuogee Hsieh <khsieh@codeaurora.org>

  - Kuogee Hsieh <quic_khsieh@quicinc.com>



description: |

  Device tree bindings for DisplayPort host controller for MSM targets
@@ -76,6 +76,9 @@ properties: 
  "#sound-dai-cells":

    const: 0



  vdda-0p9-supply: true

  vdda-1p2-supply: true



  ports:

    $ref: /schemas/graph.yaml#/properties/ports

    properties:
@@ -137,6 +140,9 @@ examples: 


        power-domains = <&rpmhpd SC7180_CX>;



        vdda-0p9-supply = <&vdda_usb_ss_dp_core>;

        vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>;



        ports {

            #address-cells = <1>;

            #size-cells = <0>;

Documentation/devicetree/bindings/display/msm/hdmi.txt

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Qualcomm adreno/snapdragon hdmi output



Required properties:

- compatible: one of the following

   * "qcom,hdmi-tx-8996"

   * "qcom,hdmi-tx-8994"

   * "qcom,hdmi-tx-8084"

   * "qcom,hdmi-tx-8974"

   * "qcom,hdmi-tx-8660"

   * "qcom,hdmi-tx-8960"

- reg: Physical base address and length of the controller's registers

- reg-names: "core_physical"

- interrupts: The interrupt signal from the hdmi block.

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See ../clocks/clock-bindings.txt for details.

- core-vdda-supply: phandle to supply regulator

- hdmi-mux-supply: phandle to mux regulator

- phys: the phandle for the HDMI PHY device

- phy-names: the name of the corresponding PHY device



Optional properties:

- hpd-gpios: hpd pin

- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin

- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin

- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin

- power-domains: reference to the power domain(s), if available.

- pinctrl-names: the pin control state names; should contain "default"

- pinctrl-0: the default pinctrl state (active)

- pinctrl-1: the "sleep" pinctrl state



HDMI PHY:

Required properties:

- compatible: Could be the following

  * "qcom,hdmi-phy-8660"

  * "qcom,hdmi-phy-8960"

  * "qcom,hdmi-phy-8974"

  * "qcom,hdmi-phy-8084"

  * "qcom,hdmi-phy-8996"

- #phy-cells: Number of cells in a PHY specifier; Should be 0.

- reg: Physical base address and length of the registers of the PHY sub blocks.

- reg-names: The names of register regions. The following regions are required:

  * "hdmi_phy"

  * "hdmi_pll"

  For HDMI PHY on msm8996, these additional register regions are required:

    * "hdmi_tx_l0"

    * "hdmi_tx_l1"

    * "hdmi_tx_l3"

    * "hdmi_tx_l4"

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.

- core-vdda-supply: phandle to vdda regulator device node



Example:



/ {

	...



	hdmi: hdmi@4a00000 {

		compatible = "qcom,hdmi-tx-8960";

		reg-names = "core_physical";

		reg = <0x04a00000 0x2f0>;

		interrupts = <GIC_SPI 79 0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names =

		    "core",

		    "master_iface",

		    "slave_iface";

		clocks =

		    <&mmcc HDMI_APP_CLK>,

		    <&mmcc HDMI_M_AHB_CLK>,

		    <&mmcc HDMI_S_AHB_CLK>;

		qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>;

		qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>;

		qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>;

		core-vdda-supply = <&pm8921_hdmi_mvs>;

		hdmi-mux-supply = <&ext_3p3v>;

		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;

		pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;



		phys = <&hdmi_phy>;

		phy-names = "hdmi_phy";

	};



	hdmi_phy: phy@4a00400 {

		compatible = "qcom,hdmi-phy-8960";

		reg-names = "hdmi_phy",

			    "hdmi_pll";

		reg = <0x4a00400 0x60>,

		      <0x4a00500 0x100>;

		#phy-cells = <0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names = "slave_iface";

		clocks = <&mmcc HDMI_S_AHB_CLK>;

		core-vdda-supply = <&pm8921_hdmi_mvs>;

	};

};

Documentation/devicetree/bindings/display/msm/hdmi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---



$id: http://devicetree.org/schemas/display/msm/hdmi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Adreno/Snapdragon HDMI output



maintainers:

  - Rob Clark <robdclark@gmail.com>



properties:

  compatible:

    enum:

      - qcom,hdmi-tx-8084

      - qcom,hdmi-tx-8660

      - qcom,hdmi-tx-8960

      - qcom,hdmi-tx-8974

      - qcom,hdmi-tx-8994

      - qcom,hdmi-tx-8996



  clocks:

    minItems: 1

    maxItems: 5



  clock-names:

    minItems: 1

    maxItems: 5



  reg:

    minItems: 1

    maxItems: 3



  reg-names:

    minItems: 1

    items:

      - const: core_physical

      - const: qfprom_physical

      - const: hdcp_physical



  interrupts:

    maxItems: 1



  phys:

    maxItems: 1



  phy-names:

    enum:

      - hdmi_phy

      - hdmi-phy

    deprecated: true



  core-vdda-supply:

    description: phandle to VDDA supply regulator



  hdmi-mux-supply:

    description: phandle to mux regulator

    deprecated: true



  core-vcc-supply:

    description: phandle to VCC supply regulator



  hpd-gpios:

    maxItems: 1

    description: hpd pin



  qcom,hdmi-tx-mux-en-gpios:

    maxItems: 1

    deprecated: true

    description: HDMI mux enable pin



  qcom,hdmi-tx-mux-sel-gpios:

    maxItems: 1

    deprecated: true

    description: HDMI mux select pin



  qcom,hdmi-tx-mux-lpm-gpios:

    maxItems: 1

    deprecated: true

    description: HDMI mux lpm pin



  '#sound-dai-cells':

    const: 1



  ports:

    type: object

    $ref: /schemas/graph.yaml#/properties/ports

    properties:

      port@0:

        $ref: /schemas/graph.yaml#/$defs/port-base

        description: |

          Input endpoints of the controller.



      port@1:

        $ref: /schemas/graph.yaml#/$defs/port-base

        description: |

          Output endpoints of the controller.



    required:

      - port@0



required:

  - compatible

  - clocks

  - clock-names

  - reg

  - reg-names

  - interrupts

  - phys



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,hdmi-tx-8960

              - qcom,hdmi-tx-8660

    then:

      properties:

        clocks:

          minItems: 3

          maxItems: 3

        clock-names:

          items:

            - const: core

            - const: master_iface

            - const: slave_iface

        core-vcc-supplies: false



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,hdmi-tx-8974

              - qcom,hdmi-tx-8084

              - qcom,hdmi-tx-8994

              - qcom,hdmi-tx-8996

    then:

      properties:

        clocks:

          minItems: 5

        clock-names:

          items:

            - const: mdp_core

            - const: iface

            - const: core

            - const: alt_iface

            - const: extp

        hdmi-mux-supplies: false



additionalProperties: false



examples:

  - |

    #include <dt-bindings/gpio/gpio.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    hdmi: hdmi@4a00000 {

      compatible = "qcom,hdmi-tx-8960";

      reg-names = "core_physical";

      reg = <0x04a00000 0x2f0>;

      interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

      clock-names = "core",

                    "master_iface",

                    "slave_iface";

      clocks = <&clk 61>,

               <&clk 72>,

               <&clk 98>;

      hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>;

      core-vdda-supply = <&pm8921_hdmi_mvs>;

      hdmi-mux-supply = <&ext_3p3v>;

      pinctrl-names = "default", "sleep";

      pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;

      pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;



      phys = <&hdmi_phy>;

    };

  - |

    #include <dt-bindings/clock/qcom,gcc-msm8996.h>

    #include <dt-bindings/clock/qcom,mmcc-msm8996.h>

    #include <dt-bindings/gpio/gpio.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    hdmi@9a0000 {

      compatible = "qcom,hdmi-tx-8996";

      reg = <0x009a0000 0x50c>,

            <0x00070000 0x6158>,

            <0x009e0000 0xfff>;

      reg-names = "core_physical",

                  "qfprom_physical",

                  "hdcp_physical";



      interrupt-parent = <&mdss>;

      interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;



      clocks = <&mmcc MDSS_MDP_CLK>,

               <&mmcc MDSS_AHB_CLK>,

               <&mmcc MDSS_HDMI_CLK>,

               <&mmcc MDSS_HDMI_AHB_CLK>,

               <&mmcc MDSS_EXTPCLK_CLK>;

      clock-names = "mdp_core",

                    "iface",

                    "core",

                    "alt_iface",

                    "extp";



      phys = <&hdmi_phy>;

      #sound-dai-cells = <1>;



      pinctrl-names = "default", "sleep";

      pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;

      pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;



      core-vdda-supply = <&vreg_l12a_1p8>;

      core-vcc-supply = <&vreg_s4a_1p8>;



      ports {

        #address-cells = <1>;

        #size-cells = <0>;



        port@0 {

          reg = <0>;

          endpoint {

            remote-endpoint = <&mdp5_intf3_out>;

          };

        };

      };

    };

...

Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---



$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-other.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Adreno/Snapdragon HDMI phy



maintainers:

  - Rob Clark <robdclark@gmail.com>



properties:

  compatible:

    enum:

      - qcom,hdmi-phy-8660

      - qcom,hdmi-phy-8960

      - qcom,hdmi-phy-8974

      - qcom,hdmi-phy-8084



  reg:

    maxItems: 2



  reg-names:

    items:

      - const: hdmi_phy

      - const: hdmi_pll



  clocks:

    minItems: 1

    maxItems: 2



  clock-names:

    minItems: 1

    maxItems: 2



  power-domains:

    maxItems: 1



  core-vdda-supply:

    description: phandle to VDDA supply regulator



  vddio-supply:

    description: phandle to VDD I/O supply regulator



  '#phy-cells':

    const: 0



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,hdmi-phy-8660

              - qcom,hdmi-phy-8960

    then:

      properties:

        clocks:

          maxItems: 1

        clock-names:

          items:

            - const: slave_iface

        vddio-supply: false



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,hdmi-phy-8084

              - qcom,hdmi-phy-8974

    then:

      properties:

        clocks:

          maxItems: 2

        clock-names:

          items:

            - const: iface

            - const: alt_iface



required:

  - compatible

  - clocks

  - reg

  - reg-names

  - '#phy-cells'



additionalProperties: false



examples:

  - |

    hdmi_phy: phy@4a00400 {

      compatible = "qcom,hdmi-phy-8960";

      reg-names = "hdmi_phy",

                  "hdmi_pll";

      reg = <0x4a00400 0x60>,

            <0x4a00500 0x100>;

      #phy-cells = <0>;

      power-domains = <&mmcc 1>;

      clock-names = "slave_iface";

      clocks = <&clk 21>;

      core-vdda-supply = <&pm8921_hdmi_mvs>;

    };

Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---



$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Adreno/Snapdragon QMP HDMI phy



maintainers:

  - Rob Clark <robdclark@gmail.com>



properties:

  compatible:

    enum:

      - qcom,hdmi-phy-8996



  reg:

    maxItems: 6



  reg-names:

    items:

      - const: hdmi_pll

      - const: hdmi_tx_l0

      - const: hdmi_tx_l1

      - const: hdmi_tx_l2

      - const: hdmi_tx_l3

      - const: hdmi_phy



  clocks:

    maxItems: 2



  clock-names:

    items:

      - const: iface

      - const: ref



  power-domains:

    maxItems: 1



  vcca-supply:

    description: phandle to VCCA supply regulator



  vddio-supply:

    description: phandle to VDD I/O supply regulator



  '#phy-cells':

    const: 0



required:

  - compatible

  - clocks

  - clock-names

  - reg

  - reg-names

  - '#phy-cells'



additionalProperties: false



examples:

  - |

    hdmi-phy@9a0600 {

      compatible = "qcom,hdmi-phy-8996";

      reg = <0x009a0600 0x1c4>,

            <0x009a0a00 0x124>,

            <0x009a0c00 0x124>,

            <0x009a0e00 0x124>,

            <0x009a1000 0x124>,

            <0x009a1200 0x0c8>;

      reg-names = "hdmi_pll",

                  "hdmi_tx_l0",

                  "hdmi_tx_l1",

                  "hdmi_tx_l2",

                  "hdmi_tx_l3",

                  "hdmi_phy";



      clocks = <&mmcc 116>,

               <&gcc 214>;

      clock-names = "iface",

                    "ref";

      #phy-cells = <0>;



      vddio-supply = <&vreg_l12a_1p8>;

      vcca-supply = <&vreg_l28a_0p925>;

    };