Commit 1fe3c164 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Wen Jin
Browse files

x86/cpu: Fix Crestmont uarch 

mainline inclusion
from mainline-v6.6-rc1
commit 0cfd8fba
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8Y47N
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0cfd8fbadd6833d243c9a9d8649ba4a9f4361c93



--------------------------------

Sierra Forest and Grand Ridge are both E-core only using Crestmont
micro-architecture, They fit the pre-existing naming scheme prefectly
fine, adhere to it.

Intel-SIG: commit 0cfd8fba x86/cpu: Fix Crestmont uarch.
EDAC Support is related to the name definition of platform.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230807150405.757666627@infradead.org


Signed-off-by: default avatarWen Jin <wen.jin@intel.com>
parent 04ecf167

drivers/edac/i10nm_base.c

+1 −1
Original line number Diff line number Diff line
@@ -950,7 +950,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = { 
	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

	{}

};

MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);