Commit 1fdaaa13 authored by Ajit Kumar Pandey's avatar Ajit Kumar Pandey Committed by Stephen Boyd
Browse files

clk: x86: Fix clk_gate_flags for RV_CLK_GATE 



In newer SoC we have to clear bit for disabling 48MHz oscillator
clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
and disable of 48MHz clock.

Signed-off-by: default avatarAjit Kumar Pandey <AjitKumar.Pandey@amd.com>
Reviewed-by: default avatarMario Limonciello <Mario.Limonciello@amd.com>
Link: https://lore.kernel.org/r/20211212180527.1641362-6-AjitKumar.Pandey@amd.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent c33917b4

drivers/clk/x86/clk-fch.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static int fch_clk_probe(struct platform_device *pdev) 


		hws[CLK_GATE_FIXED] = clk_hw_register_gate(NULL, "oscout1",

			"clk48MHz", 0, fch_data->base + MISCCLKCNTL1,

			OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);

			OSCCLKENB, 0, NULL);



		devm_clk_hw_register_clkdev(&pdev->dev, hws[CLK_GATE_FIXED],

					    fch_data->name, NULL);