Commit 1f77204e authored by Josua Mayer's avatar Josua Mayer Committed by Jakub Kicinski
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dt-bindings: net: adin: document phy clock output properties 



The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.

Add DT properties to configure both pins.

Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.

Signed-off-by: default avatarJosua Mayer <josua@solid-run.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent a3641ca4

Documentation/devicetree/bindings/net/adi,adin.yaml

+15 −0
Original line number Diff line number Diff line
@@ -36,6 +36,21 @@ properties: 
    enum: [ 4, 8, 12, 16, 20, 24 ]

    default: 8



  adi,phy-output-clock:

    description: Select clock output on GP_CLK pin. Two clocks are available:

      A 25MHz reference and a free-running 125MHz.

      The phy can alternatively automatically switch between the reference and

      the 125MHz clocks based on its internal state.

    $ref: /schemas/types.yaml#/definitions/string

    enum:

      - 25mhz-reference

      - 125mhz-free-running

      - adaptive-free-running



  adi,phy-output-reference-clock:

    description: Enable 25MHz reference clock output on CLK25_REF pin.

    type: boolean



unevaluatedProperties: false



examples: