Commit 1f6f655e authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Borislav Petkov
Browse files

x86/mm: Add a x86_has_pat_wp() helper 



Abstract the ioremap code away from the caching mode internals.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200408152745.1565832-2-hch@lst.de
parent ae83d0b4

arch/x86/include/asm/memtype.h

+2 −0
Original line number Diff line number Diff line
@@ -24,4 +24,6 @@ extern void memtype_free_io(resource_size_t start, resource_size_t end); 


extern bool pat_pfn_immune_to_uc_mtrr(unsigned long pfn);



bool x86_has_pat_wp(void);



#endif /* _ASM_X86_MEMTYPE_H */

arch/x86/mm/init.c

+6 −0
Original line number Diff line number Diff line
@@ -71,6 +71,12 @@ uint8_t __pte2cachemode_tbl[8] = { 
};

EXPORT_SYMBOL(__pte2cachemode_tbl);



/* Check that the write-protect PAT entry is set for write-protect */

bool x86_has_pat_wp(void)

{

	return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP;

}



static unsigned long __initdata pgt_buf_start;

static unsigned long __initdata pgt_buf_end;

static unsigned long __initdata pgt_buf_top;

arch/x86/mm/ioremap.c

+2 −6
Original line number Diff line number Diff line
@@ -778,10 +778,8 @@ void __init *early_memremap_encrypted(resource_size_t phys_addr, 
void __init *early_memremap_encrypted_wp(resource_size_t phys_addr,

					 unsigned long size)

{

	/* Be sure the write-protect PAT entry is set for write-protect */

	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)

	if (!x86_has_pat_wp())

		return NULL;



	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP);

}
@@ -799,10 +797,8 @@ void __init *early_memremap_decrypted(resource_size_t phys_addr, 
void __init *early_memremap_decrypted_wp(resource_size_t phys_addr,

					 unsigned long size)

{

	/* Be sure the write-protect PAT entry is set for write-protect */

	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)

	if (!x86_has_pat_wp())

		return NULL;



	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP);

}

#endif	/* CONFIG_AMD_MEM_ENCRYPT */