Commit 1ed34da6 authored by Gokul Sriram Palanisamy's avatar Gokul Sriram Palanisamy Committed by Bjorn Andersson
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arm64: dts: qcom: Add board support for HK10



Add initial support for IPQ8074 SoC based HK10-C1
and HK10-C2 evaluation boards.

Signed-off-by: default avatarGokul Sriram Palanisamy <gokulsri@codeaurora.org>
Link: https://lore.kernel.org/r/1614328110-28866-2-git-send-email-gokulsri@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 6215d3f0
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@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk10-c1.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk10-c2.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-alcatel-idol347.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-asus-z00l.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-longcheer-l8150.dtb
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// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
 */
/dts-v1/;

#include "ipq8074-hk10.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C1";
	compatible = "qcom,ipq8074-hk10-c1", "qcom,ipq8074";
};
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// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
 */
#include "ipq8074-hk10.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C2";
	compatible = "qcom,ipq8074-hk10-c2", "qcom,ipq8074";
};
+76 −0
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// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
 */
/dts-v1/;

#include "ipq8074.dtsi"

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;

	interrupt-parent = <&intc>;

	aliases {
		serial0 = &blsp1_uart5;
	};

	chosen {
		stdout-path = "serial0";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x40000000 0x0 0x20000000>;
	};
};

&blsp1_spi1 {
	status = "ok";

	m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;
	};
};

&blsp1_uart5 {
	status = "ok";
};

&pcie0 {
	status = "ok";
	perst-gpio = <&tlmm 58 0x1>;
};

&pcie1 {
	status = "ok";
	perst-gpio = <&tlmm 61 0x1>;
};

&pcie_phy0 {
	status = "ok";
};

&pcie_phy1 {
	status = "ok";
};

&qpic_bam {
	status = "ok";
};

&qpic_nand {
	status = "ok";

	nand@0 {
		reg = <0>;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;
		nand-bus-width = <8>;
	};
};