Unverified Commit 1ec15964 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!3267 x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs 

Merge Pull Request from: @ci-robot 
 
PR sync from: liwei <liwei728@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/IZ7NAMECWJGCWHGY7DMRGTETIJLNDAJC/ 
 
https://gitee.com/openeuler/kernel/issues/I8MCB5 
 
Link:https://gitee.com/openeuler/kernel/pulls/3267

 

Reviewed-by: default avatarWei Li <liwei391@huawei.com>
Signed-off-by: default avatarZhang Changzhong <zhangchangzhong@huawei.com>
parents cc8c90c4 5eb6ac60

arch/x86/include/asm/msr-index.h

+4 −0
Original line number Diff line number Diff line
@@ -442,6 +442,10 @@ 


#define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f



/* Zen4 */

#define MSR_ZEN4_BP_CFG			0xc001102e

#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5



/* Fam 17h MSRs */

#define MSR_F17H_IRPERF			0xc00000e9

arch/x86/kernel/cpu/amd.c

+9 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ static const int amd_erratum_383[]; 
static const int amd_erratum_400[];

static const int amd_zenbleed[];

static const int amd_div0[];

static const int amd_erratum_1485[];

static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);



/*
@@ -1044,6 +1045,10 @@ static void init_amd(struct cpuinfo_x86 *c) 
		pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");

		setup_force_cpu_bug(X86_BUG_DIV0);

	}



	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&

		cpu_has_amd_erratum(c, amd_erratum_1485))

			msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);

}



#ifdef CONFIG_X86_32
@@ -1177,6 +1182,10 @@ static const int amd_zenbleed[] = 
			   AMD_MODEL_RANGE(0x17, 0x90, 0x0, 0x91, 0xf),

			   AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf));



static const int amd_erratum_1485[] =

	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),

				AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));



static const int amd_div0[] =

	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x00, 0x0, 0x2f, 0xf),

			   AMD_MODEL_RANGE(0x17, 0x50, 0x0, 0x5f, 0xf));