Commit 1eb4dfac authored by Bang Li's avatar Bang Li Committed by Liu Shixin
Browse files

mm: add update_mmu_tlb_range() 

mainline inclusion
from mainline-v6.11-rc1
commit 23b1b44e6c61295084284aa7d87db863a7802b92
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IAIHPC

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=23b1b44e6c61295084284aa7d87db863a7802b92

--------------------------------

Patch series "Add update_mmu_tlb_range() to simplify code", v4.

This series of commits mainly adds the update_mmu_tlb_range() to batch
update tlb in an address range and implement update_mmu_tlb() using
update_mmu_tlb_range().

After commit 19eaf44954df ("mm: thp: support allocation of anonymous
multi-size THP"), We may need to batch update tlb of a certain address
range by calling update_mmu_tlb() in a loop.  Using the
update_mmu_tlb_range(), we can simplify the code and possibly reduce the
execution of some unnecessary code in some architectures.

This patch (of 3):

Add update_mmu_tlb_range(), we can batch update tlb of an address range.

Link: https://lkml.kernel.org/r/20240522061204.117421-1-libang.li@antgroup.com
Link: https://lkml.kernel.org/r/20240522061204.117421-2-libang.li@antgroup.com


Signed-off-by: default avatarBang Li <libang.li@antgroup.com>
Acked-by: default avatarDavid Hildenbrand <david@redhat.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Lance Yang <ioworker0@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Ryan Roberts <ryan.roberts@arm.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLiu Shixin <liushixin2@huawei.com>
parent c3689201

arch/loongarch/include/asm/pgtable.h

+2 −0
Original line number Diff line number Diff line
@@ -472,6 +472,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, 


#define __HAVE_ARCH_UPDATE_MMU_TLB

#define update_mmu_tlb	update_mmu_cache

#define update_mmu_tlb_range(vma, addr, ptep, nr) \

	update_mmu_cache_range(NULL, vma, addr, ptep, nr)



static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,

			unsigned long address, pmd_t *pmdp)

arch/mips/include/asm/pgtable.h

+2 −0
Original line number Diff line number Diff line
@@ -596,6 +596,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, 


#define	__HAVE_ARCH_UPDATE_MMU_TLB

#define update_mmu_tlb	update_mmu_cache

#define update_mmu_tlb_range(vma, address, ptep, nr) \

	update_mmu_cache_range(NULL, vma, address, ptep, nr)



static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,

	unsigned long address, pmd_t *pmdp)

arch/riscv/include/asm/pgtable.h

+2 −0
Original line number Diff line number Diff line
@@ -493,6 +493,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, 


#define __HAVE_ARCH_UPDATE_MMU_TLB

#define update_mmu_tlb update_mmu_cache

#define update_mmu_tlb_range(vma, addr, ptep, nr) \

	update_mmu_cache_range(NULL, vma, addr, ptep, nr)



static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,

		unsigned long address, pmd_t *pmdp)

arch/xtensa/include/asm/pgtable.h

+3 −0
Original line number Diff line number Diff line
@@ -413,6 +413,9 @@ typedef pte_t *pte_addr_t; 
void update_mmu_tlb(struct vm_area_struct *vma,

		    unsigned long address, pte_t *ptep);

#define __HAVE_ARCH_UPDATE_MMU_TLB

void update_mmu_tlb_range(struct vm_area_struct *vma,

		unsigned long address, pte_t *ptep, unsigned int nr);

#define update_mmu_tlb_range update_mmu_tlb_range



#endif /* !defined (__ASSEMBLY__) */

arch/xtensa/mm/tlb.c

+6 −0
Original line number Diff line number Diff line
@@ -169,6 +169,12 @@ void update_mmu_tlb(struct vm_area_struct *vma, 
	local_flush_tlb_page(vma, address);

}



void update_mmu_tlb_range(struct vm_area_struct *vma,

			unsigned long address, pte_t *ptep, unsigned int nr)

{

	local_flush_tlb_range(vma, address, address + PAGE_SIZE * nr);

}



#ifdef CONFIG_DEBUG_TLB_SANITY



static unsigned get_pte_for_vaddr(unsigned vaddr)