Commit 1ea7fe77 authored by Chris Wilson's avatar Chris Wilson Committed by Rodrigo Vivi
Browse files

drm/i915: Bump GT idling delay to 2 jiffies 

In monitoring a transcode pipeline that is latency sensitive (it waits
between submitting frames, and each frame requires work on rcs/vcs/vecs
engines), it is found that it took longer than a single jiffy for it to
sustain its workload. Allowing an extra jiffy headroom for the userspace
prevents us from prematurely parking and having to exit powersaving
immediately.

Link: https://gitlab.freedesktop.org/drm/intel/-/issues/6284


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarKarolina Drobnik <karolina.drobnik@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e37911ec087a9ce50630d6faf61fa2c0d5f96d44.1657289332.git.karolina.drobnik@intel.com
parent 394e2b57

drivers/gpu/drm/i915/i915_active.c

+1 −1
Original line number Diff line number Diff line
@@ -974,7 +974,7 @@ void i915_active_acquire_barrier(struct i915_active *ref) 


		GEM_BUG_ON(!intel_engine_pm_is_awake(engine));

		llist_add(barrier_to_ll(node), &engine->barrier_tasks);

		intel_engine_pm_put_delay(engine, 1);

		intel_engine_pm_put_delay(engine, 2);

	}

}