Commit 1e994cc0 authored by Daniel Miess's avatar Daniel Miess Committed by Alex Deucher
Browse files

drm/amd/display: limit timing for single dimm memory 



[Why]
1. It could hit bandwidth limitdation under single dimm
memory when connecting 8K external monitor.
2. IsSupportedVidPn got validation failed with
2K240Hz eDP + 8K24Hz external monitor.
3. It's better to filter out such combination in
EnumVidPnCofuncModality
4. For short term, filter out in dc bandwidth validation.

[How]
Force 2K@240Hz+8K@24Hz timing validation false in dc.

Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarDaniel Miess <Daniel.Miess@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 6d9240c4

drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c

+20 −0
Original line number Diff line number Diff line
@@ -1697,6 +1697,23 @@ static void dcn314_get_panel_config_defaults(struct dc_panel_config *panel_confi 
	*panel_config = panel_config_defaults;

}



static bool filter_modes_for_single_channel_workaround(struct dc *dc,

		struct dc_state *context)

{

	// Filter 2K@240Hz+8K@24fps above combination timing if memory only has single dimm LPDDR

	if (dc->clk_mgr->bw_params->vram_type == 34 && dc->clk_mgr->bw_params->num_channels < 2) {

		int total_phy_pix_clk = 0;



		for (int i = 0; i < context->stream_count; i++)

			if (context->res_ctx.pipe_ctx[i].stream)

				total_phy_pix_clk += context->res_ctx.pipe_ctx[i].stream->phy_pix_clk;



		if (total_phy_pix_clk >= (1148928+826260)) //2K@240Hz+8K@24fps

			return true;

	}

	return false;

}



bool dcn314_validate_bandwidth(struct dc *dc,

		struct dc_state *context,

		bool fast_validate)
@@ -1712,6 +1729,9 @@ bool dcn314_validate_bandwidth(struct dc *dc, 


	BW_VAL_TRACE_COUNT();



	if (filter_modes_for_single_channel_workaround(dc, context))

		goto validate_fail;



	DC_FP_START();

	// do not support self refresh only

	out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, false);