Commit 1e5588d1 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
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drm/amd/display: Fallback to clocks which meet requested voltage on DCN31 



[WHY]
On certain configs, SMU clock table voltages don't match which cause parser
to behave incorrectly by leaving dcfclk and socclk table entries unpopulated.

[HOW]
Currently the function that finds the corresponding clock for a given voltage
only checks for exact voltage level matches. In the case that no match gets
found, parser now falls back to searching for the max clock which meets the
requested voltage (i.e. its corresponding voltage is below requested).

Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 31484207

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

+10 −3
Original line number Diff line number Diff line
@@ -523,14 +523,21 @@ static unsigned int find_clk_for_voltage( 
		unsigned int voltage)

{

	int i;

	int max_voltage = 0;

	int clock = 0;



	for (i = 0; i < NUM_SOC_VOLTAGE_LEVELS; i++) {

		if (clock_table->SocVoltage[i] == voltage)

		if (clock_table->SocVoltage[i] == voltage) {

			return clocks[i];

		} else if (clock_table->SocVoltage[i] >= max_voltage &&

				clock_table->SocVoltage[i] < voltage) {

			max_voltage = clock_table->SocVoltage[i];

			clock = clocks[i];

		}

	}



	ASSERT(0);

	return 0;

	ASSERT(clock);

	return clock;

}



void dcn31_clk_mgr_helper_populate_bw_params(