Commit 1e25c5f5 authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Rob Herring
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dt-bindings: mtd: Convert stm32 fmc2-nand bindings to json-schema



Convert the STM32 fmc2-nand binding to DT schema format using json-schema

Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
CC: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 34376eb1
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings

maintainers:
  - Christophe Kerello <christophe.kerello@st.com>

allOf:
  - $ref: "nand-controller.yaml#"

properties:
  compatible:
    const: st,stm32mp15-fmc2

  reg:
    items:
      - description: Registers
      - description: Chip select 0 data
      - description: Chip select 0 command
      - description: Chip select 0 address space
      - description: Chip select 1 data
      - description: Chip select 1 command
      - description: Chip select 1 address space

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  resets:
    maxItems: 1

  dmas:
    items:
      - description: tx DMA channel
      - description: rx DMA channel
      - description: ecc DMA channel

  dma-names:
    items:
      - const: tx
      - const: rx
      - const: ecc

patternProperties:
  "^nand@[a-f0-9]$":
    type: object
    properties:
      nand-ecc-step-size:
        const: 512

      nand-ecc-strength:
        enum: [1, 4 ,8 ]

required:
  - compatible
  - reg
  - interrupts
  - clocks

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/stm32mp1-clks.h>
    #include <dt-bindings/reset/stm32mp1-resets.h>
    nand-controller@58002000 {
      compatible = "st,stm32mp15-fmc2";
      reg = <0x58002000 0x1000>,
            <0x80000000 0x1000>,
            <0x88010000 0x1000>,
            <0x88020000 0x1000>,
            <0x81000000 0x1000>,
            <0x89010000 0x1000>,
            <0x89020000 0x1000>;
            interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
            dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
                   <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
                   <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
            dma-names = "tx", "rx", "ecc";
            clocks = <&rcc FMC_K>;
            resets = <&rcc FMC_R>;
      #address-cells = <1>;
      #size-cells = <0>;

      nand@0 {
        reg = <0>;
        nand-on-flash-bbt;
        #address-cells = <1>;
        #size-cells = <1>;
      };
    };

...
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STMicroelectronics Flexible Memory Controller 2 (FMC2)
NAND Interface

Required properties:
- compatible: Should be one of:
              * st,stm32mp15-fmc2
- reg: NAND flash controller memory areas.
       First region contains the register location.
       Regions 2 to 4 respectively contain the data, command,
       and address space for CS0.
       Regions 5 to 7 contain the same areas for CS1.
- interrupts: The interrupt number
- pinctrl-0: Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
- clocks: The clock needed by the NAND flash controller

Optional properties:
- resets: Reference to a reset controller asserting the FMC controller
- dmas: DMA specifiers (see: dma/stm32-mdma.txt)
- dma-names: Must be "tx", "rx" and "ecc"

* NAND device bindings:

Required properties:
- reg: describes the CS lines assigned to the NAND device.

Optional properties:
- nand-on-flash-bbt: see nand-controller.yaml
- nand-ecc-strength: see nand-controller.yaml
- nand-ecc-step-size: see nand-controller.yaml

The following ECC strength and step size are currently supported:
 - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)
 - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
 - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) (default)

Example:

	fmc: nand-controller@58002000 {
		compatible = "st,stm32mp15-fmc2";
		reg = <0x58002000 0x1000>,
		      <0x80000000 0x1000>,
		      <0x88010000 0x1000>,
		      <0x88020000 0x1000>,
		      <0x81000000 0x1000>,
		      <0x89010000 0x1000>,
		      <0x89020000 0x1000>;
		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&rcc FMC_K>;
		resets = <&rcc FMC_R>;
		pinctrl-names = "default";
		pinctrl-0 = <&fmc_pins_a>;
		#address-cells = <1>;
		#size-cells = <0>;

		nand@0 {
			reg = <0>;
			nand-on-flash-bbt;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};