Unverified Commit 1e14b4f9 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v6.3-next-dts64' of... 

Merge tag 'v6.3-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/dt

mt6795
- enable frequency hopping controller (FHCTL)
- add i2c, power domains and some clocks for video enconde/decode
- Sony Xperia M5 enable touchscreen, proximity sensor, accelerometer
  and NFC

mt8173
- align keys with DT binding

mt8183
- enable GPU DVFS

mt8186
- enable GPU

mt8192
- enable GPU

mt8195
- add mutex for Video Processor Pipeline Subsystem (VPP)
- add support for Mali-G57 Valhall Natt GPU baked by panfrost
- add support for display on vdosys1
- add thermal support
- add display PWM

mt8365
- add support for the eval kit including i2c, pmic-wrapper, mmc and
  ethernet

* tag 'v6.3-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (50 commits)
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: mediatek: mt8173: correct GPIO keys wakeup
  arm64: dts: mediatek: mt6795-xperia-m5: Add NXP PN547 NFC on I2C3
  arm64: dts: mediatek: mt6795-xperia-m5: Add Sensortek STK3310 Proximity
  arm64: dts: mediatek: mt6795-xperia-m5: Add Synaptics RMI4 Touchscreen
  arm64: dts: mediatek: mt6795-xperia-m5: Enable I2C 0-3 busses
  arm64: dts: mediatek: mt6795: Add VDECSYS and VENCSYS clocks
  arm64: dts: mediatek: mt6795: Add SoC power domains
  arm64: dts: mediatek: mt6795: Add nodes for I2C controllers
  arm64: dts: mediatek: mt6795: xperia-m5: Enable Frequency Hopping
  arm64: dts: mediatek: mt6795: Add apmixedsys syscon node
  arm64: dts: mediatek: mt6795: Add Frequency Hopping Controller node
  arm64: dts: mediatek: cherry: Add configuration for display backlight
  arm64: dts: mediatek: mt8195: Add display pwm nodes
  arm64: dts: mediatek: mt8195: Add temperature mitigation threshold
  arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes
  arm64: dts: mediatek: add ethernet support for mt8365 SoC
  arm64: dts: mediatek: add mmc support for mt8365 SoC
  ...

Link: https://lore.kernel.org/r/6920736b-ddb3-29df-d0b2-46db40cef49f@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7e829856 13961ef8

arch/arm64/boot/dts/mediatek/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -52,4 +52,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r2.dtb 
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r3.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb

arch/arm64/boot/dts/mediatek/mt2712e.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -559,7 +559,7 @@ 
		status = "disabled";

	};



	nandc: nfi@1100e000 {

	nandc: nand-controller@1100e000 {

		compatible = "mediatek,mt2712-nfc";

		reg = <0 0x1100e000 0 0x1000>;

		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;

arch/arm64/boot/dts/mediatek/mt6357.dtsi

0 → 100644
+282 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (c) 2020 MediaTek Inc.

 * Copyright (c) 2023 BayLibre Inc.

 */



#include <dt-bindings/input/input.h>



&pwrap {

	mt6357_pmic: pmic {

		compatible = "mediatek,mt6357";



		regulators {

			mt6357_vproc_reg: buck-vproc {

				regulator-name = "vproc";

				regulator-min-microvolt = <518750>;

				regulator-max-microvolt = <1312500>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <220>;

				regulator-always-on;

			};



			mt6357_vcore_reg: buck-vcore {

				regulator-name = "vcore";

				regulator-min-microvolt = <518750>;

				regulator-max-microvolt = <1312500>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <220>;

				regulator-always-on;

			};



			mt6357_vmodem_reg: buck-vmodem {

				regulator-name = "vmodem";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1193750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <220>;

			};



			mt6357_vs1_reg: buck-vs1 {

				regulator-name = "vs1";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <2200000>;

				regulator-ramp-delay = <12500>;

				regulator-enable-ramp-delay = <220>;

				regulator-always-on;

			};



			mt6357_vpa_reg: buck-vpa {

				regulator-name = "vpa";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <3650000>;

				regulator-ramp-delay = <50000>;

				regulator-enable-ramp-delay = <220>;

			};



			mt6357_vfe28_reg: ldo-vfe28 {

				compatible = "regulator-fixed";

				regulator-name = "vfe28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vxo22_reg: ldo-vxo22 {

				regulator-name = "vxo22";

				regulator-min-microvolt = <2200000>;

				regulator-max-microvolt = <2400000>;

				regulator-enable-ramp-delay = <110>;

			};



			mt6357_vrf18_reg: ldo-vrf18 {

				compatible = "regulator-fixed";

				regulator-name = "vrf18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <110>;

			};



			mt6357_vrf12_reg: ldo-vrf12 {

				compatible = "regulator-fixed";

				regulator-name = "vrf12";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <1200000>;

				regulator-enable-ramp-delay = <110>;

			};



			mt6357_vefuse_reg: ldo-vefuse {

				regulator-name = "vefuse";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcn33_bt_reg: ldo-vcn33-bt {

				regulator-name = "vcn33-bt";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3500000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcn33_wifi_reg: ldo-vcn33-wifi {

				regulator-name = "vcn33-wifi";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3500000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcn28_reg: ldo-vcn28 {

				compatible = "regulator-fixed";

				regulator-name = "vcn28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcn18_reg: ldo-vcn18 {

				compatible = "regulator-fixed";

				regulator-name = "vcn18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcama_reg: ldo-vcama {

				regulator-name = "vcama";

				regulator-min-microvolt = <2500000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcamd_reg: ldo-vcamd {

				regulator-name = "vcamd";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vcamio_reg: ldo-vcamio18 {

				compatible = "regulator-fixed";

				regulator-name = "vcamio";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vldo28_reg: ldo-vldo28 {

				regulator-name = "vldo28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vsram_others_reg: ldo-vsram-others {

				regulator-name = "vsram-others";

				regulator-min-microvolt = <518750>;

				regulator-max-microvolt = <1312500>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <110>;

				regulator-always-on;

			};



			mt6357_vsram_proc_reg: ldo-vsram-proc {

				regulator-name = "vsram-proc";

				regulator-min-microvolt = <518750>;

				regulator-max-microvolt = <1312500>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <110>;

				regulator-always-on;

			};



			mt6357_vaux18_reg: ldo-vaux18 {

				compatible = "regulator-fixed";

				regulator-name = "vaux18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vaud28_reg: ldo-vaud28 {

				compatible = "regulator-fixed";

				regulator-name = "vaud28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vio28_reg: ldo-vio28 {

				compatible = "regulator-fixed";

				regulator-name = "vio28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vio18_reg: ldo-vio18 {

				compatible = "regulator-fixed";

				regulator-name = "vio18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <264>;

				regulator-always-on;

			};



			mt6357_vdram_reg: ldo-vdram {

				regulator-name = "vdram";

				regulator-min-microvolt = <1100000>;

				regulator-max-microvolt = <1200000>;

				regulator-enable-ramp-delay = <3300>;

			};



			mt6357_vmc_reg: ldo-vmc {

				regulator-name = "vmc";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <44>;

			};



			mt6357_vmch_reg: ldo-vmch {

				regulator-name = "vmch";

				regulator-min-microvolt = <2900000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <44>;

			};



			mt6357_vemc_reg: ldo-vemc {

				regulator-name = "vemc";

				regulator-min-microvolt = <2900000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <44>;

				regulator-always-on;

			};



			mt6357_vsim1_reg: ldo-vsim1 {

				regulator-name = "vsim1";

				regulator-min-microvolt = <1700000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vsim2_reg: ldo-vsim2 {

				regulator-name = "vsim2";

				regulator-min-microvolt = <1700000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <264>;

			};



			mt6357_vibr_reg: ldo-vibr {

				regulator-name = "vibr";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <44>;

			};



			mt6357_vusb33_reg: ldo-vusb33 {

				regulator-name = "vusb33";

				regulator-min-microvolt = <3000000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <264>;

			};

		};



		rtc {

			compatible = "mediatek,mt6357-rtc";

		};



		keys {

			compatible = "mediatek,mt6357-keys";



			key-power {

				linux,keycodes = <KEY_POWER>;

				wakeup-source;

			};



			key-home {

				linux,keycodes = <KEY_HOME>;

				wakeup-source;

			};



		};

	};

};

arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts

+166 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
 */



/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "mt6795.dtsi"



/ {
@@ -48,7 +49,172 @@ 
	};

};



&fhctl {

	clocks = <&apmixedsys CLK_APMIXED_MAINPLL>, <&apmixedsys CLK_APMIXED_MPLL>,

		 <&apmixedsys CLK_APMIXED_MSDCPLL>;

	mediatek,hopping-ssc-percent = <8>, <5>, <8>;

	status = "okay";

};



&i2c0 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c0_pins>;

	status = "okay";

};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c1_pins>;

	status = "okay";



	accelerometer@10 {

		compatible = "bosch,bma255";

		reg = <0x10>;

		pinctrl-names = "default";

		pinctrl-0 = <&accel_pins>;

	};



	magnetometer@12 {

		compatible = "bosch,bmm150";

		reg = <0x12>;

	};

};



&i2c2 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c2_pins>;

	status = "okay";



	touchscreen@20 {

		compatible = "syna,rmi4-i2c";

		reg = <0x20>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_FALLING>;

		pinctrl-names = "default";

		pinctrl-0 = <&ts_pins>;

		syna,startup-delay-ms = <160>;

		syna,reset-delay-ms = <90>;



		rmi4-f01@1 {

			reg = <0x1>;

			syna,nosleep-mode = <1>;

		};



		rmi4-f12@12 {

			reg = <0x12>;

			syna,sensor-type = <1>;

		};

	};

};



&i2c3 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c3_pins>;

	status = "okay";



	pn547: nfc@28 {

		compatible = "nxp,pn544-i2c";

		reg = <0x28>;

		interrupts-extended = <&pio 3 IRQ_TYPE_EDGE_RISING>;

		pinctrl-names = "default";

		pinctrl-0 = <&nfc_pins>;

		enable-gpios = <&pio 149 GPIO_ACTIVE_HIGH>;

		firmware-gpios = <&pio 94 GPIO_ACTIVE_HIGH>;

	};



	proximity@48 {

		compatible = "sensortek,stk3310";

		reg = <0x48>;

		interrupts-extended = <&pio 8 IRQ_TYPE_EDGE_FALLING>;

		pinctrl-names = "default";

		pinctrl-0 = <&proximity_pins>;

	};

};



&pio {

	nfc_pins: nfc-pins {

		pins-irq {

			pinmux = <PINMUX_GPIO3__FUNC_GPIO3>;

			bias-pull-down;

			input-enable;

		};



		pins-fw-ven {

			pinmux = <PINMUX_GPIO94__FUNC_GPIO94>,

				 <PINMUX_GPIO149__FUNC_GPIO149>;

		};

	};



	ts_pins: touchscreen-pins {

		pins-irq {

			pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;

			bias-pull-up;

			input-enable;

		};



		pins-rst {

			pinmux = <PINMUX_GPIO102__FUNC_GPIO102>;

			output-high;

		};

	};



	proximity_pins: proximity-pins {

		pins-irq {

			pinmux = <PINMUX_GPIO8__FUNC_GPIO8>;

			bias-pull-up;

			input-enable;

		};

	};



	accel_pins: accelerometer-pins {

		pins-irq {

			pinmux = <PINMUX_GPIO12__FUNC_GPIO12>;

			bias-pull-up;

			input-enable;

		};

	};



	i2c0_pins: i2c0-pins {

		pins-bus {

			pinmux = <PINMUX_GPIO45__FUNC_SDA0>,

				 <PINMUX_GPIO46__FUNC_SCL0>;

			input-enable;

		};

	};



	i2c1_pins: i2c1-pins {

		pins-bus {

			pinmux = <PINMUX_GPIO125__FUNC_SDA1>,

				 <PINMUX_GPIO126__FUNC_SCL1>;

			bias-disable;

		};

	};



	i2c2_pins: i2c2-pins {

		pins-bus {

			pinmux = <PINMUX_GPIO43__FUNC_SDA2>,

				 <PINMUX_GPIO44__FUNC_SCL2>;

			bias-disable;

		};

	};



	i2c3_pins: i2c3-pins {

		pins-bus {

			pinmux = <PINMUX_GPIO136__FUNC_SDA3>,

				 <PINMUX_GPIO137__FUNC_SCL3>;

			bias-disable;

		};

	};



	i2c4_pins: i2c4-pins {

		pins-bus {

			pinmux = <PINMUX_GPIO100__FUNC_SDA4>,

				 <PINMUX_GPIO101__FUNC_SCL4>;

			bias-disable;

		};

	};



	uart0_pins: uart0-pins {

		pins-rx {

			pinmux = <PINMUX_GPIO113__FUNC_URXD0>;

arch/arm64/boot/dts/mediatek/mt6795.dtsi

+182 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/mediatek,mt6795-clk.h>

#include <dt-bindings/pinctrl/mt6795-pinfunc.h>

#include <dt-bindings/power/mt6795-power.h>

#include <dt-bindings/reset/mediatek,mt6795-resets.h>



/ {
@@ -264,6 +265,84 @@ 
			#reset-cells = <1>;

		};



		scpsys: syscon@10006000 {

			compatible = "syscon", "simple-mfd";

			reg = <0 0x10006000 0 0x1000>;

			#power-domain-cells = <1>;



			/* System Power Manager */

			spm: power-controller {

				compatible = "mediatek,mt6795-power-controller";

				#address-cells = <1>;

				#size-cells = <0>;

				#power-domain-cells = <1>;



				/* power domains of the SoC */

				power-domain@MT6795_POWER_DOMAIN_VDEC {

					reg = <MT6795_POWER_DOMAIN_VDEC>;

					clocks = <&topckgen CLK_TOP_MM_SEL>;

					clock-names = "mm";

					#power-domain-cells = <0>;

				};

				power-domain@MT6795_POWER_DOMAIN_VENC {

					reg = <MT6795_POWER_DOMAIN_VENC>;

					clocks = <&topckgen CLK_TOP_MM_SEL>,

						 <&topckgen CLK_TOP_VENC_SEL>;

					clock-names = "mm", "venc";

					#power-domain-cells = <0>;

				};

				power-domain@MT6795_POWER_DOMAIN_ISP {

					reg = <MT6795_POWER_DOMAIN_ISP>;

					clocks = <&topckgen CLK_TOP_MM_SEL>;

					clock-names = "mm";

					#power-domain-cells = <0>;

				};



				power-domain@MT6795_POWER_DOMAIN_MM {

					reg = <MT6795_POWER_DOMAIN_MM>;

					clocks = <&topckgen CLK_TOP_MM_SEL>;

					clock-names = "mm";

					#power-domain-cells = <0>;

					mediatek,infracfg = <&infracfg>;

				};



				power-domain@MT6795_POWER_DOMAIN_MJC {

					reg = <MT6795_POWER_DOMAIN_MJC>;

					clocks = <&topckgen CLK_TOP_MM_SEL>,

						 <&topckgen CLK_TOP_MJC_SEL>;

					clock-names = "mm", "mjc";

					#power-domain-cells = <0>;

				};



				power-domain@MT6795_POWER_DOMAIN_AUDIO {

					reg = <MT6795_POWER_DOMAIN_AUDIO>;

					#power-domain-cells = <0>;

				};



				mfg_async: power-domain@MT6795_POWER_DOMAIN_MFG_ASYNC {

					reg = <MT6795_POWER_DOMAIN_MFG_ASYNC>;

					clocks = <&clk26m>;

					clock-names = "mfg";

					#address-cells = <1>;

					#size-cells = <0>;

					#power-domain-cells = <1>;



					power-domain@MT6795_POWER_DOMAIN_MFG_2D {

						reg = <MT6795_POWER_DOMAIN_MFG_2D>;

						#address-cells = <1>;

						#size-cells = <0>;

						#power-domain-cells = <1>;



						power-domain@MT6795_POWER_DOMAIN_MFG {

							reg = <MT6795_POWER_DOMAIN_MFG>;

							#power-domain-cells = <0>;

							mediatek,infracfg = <&infracfg>;

						};

					};

				};

			};

		};



		pio: pinctrl@10005000 {

			compatible = "mediatek,mt6795-pinctrl";

			reg = <0 0x10005000 0 0x1000>, <0 0x1000b000 0 0x1000>;
@@ -310,6 +389,18 @@ 
			clock-names = "clk13m";

		};



		apmixedsys: syscon@10209000 {

			compatible = "mediatek,mt6795-apmixedsys", "syscon";

			reg = <0 0x10209000 0 0x1000>;

			#clock-cells = <1>;

		};



		fhctl: clock-controller@10209f00 {

			compatible = "mediatek,mt6795-fhctl";

			reg = <0 0x10209f00 0 0x100>;

			status = "disabled";

		};



		gic: interrupt-controller@10221000 {

			compatible = "arm,gic-400";

			#interrupt-cells = <3>;
@@ -433,6 +524,85 @@ 
			status = "disabled";

		};



		pwm2: pwm@11006000 {

			compatible = "mediatek,mt6795-pwm";

			reg = <0 0x11006000 0 0x1000>;

			#pwm-cells = <2>;

			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&topckgen CLK_TOP_PWM_SEL>,

				 <&pericfg CLK_PERI_PWM>,

				 <&pericfg CLK_PERI_PWM1>,

				 <&pericfg CLK_PERI_PWM2>,

				 <&pericfg CLK_PERI_PWM3>,

				 <&pericfg CLK_PERI_PWM4>,

				 <&pericfg CLK_PERI_PWM5>,

				 <&pericfg CLK_PERI_PWM6>,

				 <&pericfg CLK_PERI_PWM7>;

			clock-names = "top", "main", "pwm1", "pwm2", "pwm3",

				      "pwm4", "pwm5", "pwm6", "pwm7";

			status = "disabled";

		};



		i2c0: i2c@11007000 {

			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";

			reg = <0 0x11007000 0 0x70>, <0 0x11000100 0 0x80>;

			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>;

			clock-div = <16>;

			clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;

			clock-names = "main", "dma";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c1: i2c@11008000 {

			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";

			reg = <0 0x11008000 0 0x70>, <0 0x11000180 0 0x80>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>;

			clock-div = <16>;

			clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>;

			clock-names = "main", "dma";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c2: i2c@11009000 {

			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";

			reg = <0 0x11009000 0 0x70>, <0 0x11000200 0 0x80>;

			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;

			clock-div = <16>;

			clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>;

			clock-names = "main", "dma";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c3: i2c@11010000 {

			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";

			reg = <0 0x11010000 0 0x70>, <0 0x11000280 0 0x80>;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_LOW>;

			clock-div = <16>;

			clocks = <&pericfg CLK_PERI_I2C3>, <&pericfg CLK_PERI_AP_DMA>;

			clock-names = "main", "dma";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c4: i2c@11011000 {

			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";

			reg = <0 0x11011000 0 0x70>, <0 0x11000300 0 0x80>;

			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_LOW>;

			clock-div = <16>;

			clocks = <&pericfg CLK_PERI_I2C4>, <&pericfg CLK_PERI_AP_DMA>;

			clock-names = "main", "dma";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		mmc0: mmc@11230000 {

			compatible = "mediatek,mt6795-mmc";

			reg = <0 0x11230000 0 0x1000>;
@@ -473,5 +643,17 @@ 
			clock-names = "source", "hclk";

			status = "disabled";

		};



		vdecsys: clock-controller@16000000 {

			compatible = "mediatek,mt6795-vdecsys";

			reg = <0 0x16000000 0 0x1000>;

			#clock-cells = <1>;

		};



		vencsys: clock-controller@18000000 {

			compatible = "mediatek,mt6795-vencsys";

			reg = <0 0x18000000 0 0x1000>;

			#clock-cells = <1>;

		};

	};

};