Commit 1dfe967e authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI 



Clean up and commonize (where possible and it makes sense to) I2C, UART
and SDHCI nodes and pin configurations.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-20-konrad.dybcio@somainline.org
parent 9f43e197

arch/arm/boot/dts/qcom-apq8074-dragonboard.dts

+17 −44
Original line number Diff line number Diff line
@@ -26,9 +26,6 @@ 
	status = "okay";

	clock-frequency = <200000>;



	pinctrl-0 = <&i2c11_pins>;

	pinctrl-names = "default";



	eeprom: eeprom@52 {

		compatible = "atmel,24c128";

		reg = <0x52>;
@@ -256,48 +253,25 @@ 
	vmmc-supply = <&pm8941_l20>;

	vqmmc-supply = <&pm8941_s3>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc1_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc1_on>;

	pinctrl-1 = <&sdc1_off>;

};



&sdhc_2 {

	status = "okay";

	cd-gpios = <&tlmm 62 0x1>;

	pinctrl-names = "default";

	pinctrl-0 = <&sdhc2_pin_a>, <&sdhc2_cd_pin_a>;



	cd-gpios = <&tlmm 62 0x1>;

	vmmc-supply = <&pm8941_l21>;

	vqmmc-supply = <&pm8941_l13>;

};



&tlmm {

	i2c11_pins: i2c11 {

		mux {

			pins = "gpio83", "gpio84";

			function = "blsp_i2c11";

		};

	};



	spi8_default: spi8_default {

		mosi {

			pins = "gpio45";

			function = "blsp_spi8";

		};

		miso {

			pins = "gpio46";

			function = "blsp_spi8";

		};

		cs {

			pins = "gpio47";

			function = "blsp_spi8";

		};

		clk {

			pins = "gpio48";

			function = "blsp_spi8";

		};

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc2_on>;

	pinctrl-1 = <&sdc2_off>;

};



	sdhc1_pin_a: sdhc1-pin-active {

&tlmm {

	sdc1_on: sdc1-on {

		clk {

			pins = "sdc1_clk";

			drive-strength = <16>;
@@ -311,15 +285,7 @@ 
		};

	};



	sdhc2_cd_pin_a: sdhc2-cd-pin-active {

		pins = "gpio62";

		function = "gpio";



		drive-strength = <2>;

		bias-disable;

	};



	sdhc2_pin_a: sdhc2-pin-active {

	sdc2_on: sdc2-on {

		clk {

			pins = "sdc2_clk";

			drive-strength = <10>;
@@ -331,5 +297,12 @@ 
			drive-strength = <6>;

			bias-pull-up;

		};



		cd {

			pins = "gpio62";

			function = "gpio";

			drive-strength = <2>;

			bias-disable;

		};

	};

};

arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts

+8 −6
Original line number Diff line number Diff line
@@ -321,8 +321,9 @@ 
	vmmc-supply = <&pm8941_l20>;

	vqmmc-supply = <&pm8941_s3>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc1_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc1_on>;

	pinctrl-1 = <&sdc1_off>;

};



&sdhc_2 {
@@ -331,12 +332,13 @@ 
	vmmc-supply = <&pm8941_l21>;

	vqmmc-supply = <&pm8941_l13>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc2_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc2_on>;

	pinctrl-1 = <&sdc2_off>;

};



&tlmm {

	sdhc1_pin_a: sdhc1-pin-active {

	sdc1_on: sdc1-on {

		clk {

			pins = "sdc1_clk";

			drive-strength = <16>;
@@ -350,7 +352,7 @@ 
		};

	};



	sdhc2_pin_a: sdhc2-pin-active {

	sdc2_on: sdc2-on {

		clk {

			pins = "sdc2_clk";

			drive-strength = <10>;

arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts

+8 −109
Original line number Diff line number Diff line
@@ -59,9 +59,6 @@ 
	status = "okay";

	clock-frequency = <100000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c1_pins>;



	charger: bq24192@6b {

		compatible = "ti,bq24192";

		reg = <0x6b>;
@@ -93,9 +90,6 @@ 
	status = "okay";

	clock-frequency = <355000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c2_pins>;



	synaptics@70 {

		compatible = "syna,rmi4-i2c";

		reg = <0x70>;
@@ -126,9 +120,6 @@ 
	status = "okay";

	clock-frequency = <100000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c3_pins>;



	avago_apds993@39 {

		compatible = "avago,apds9930";

		reg = <0x39>;
@@ -144,9 +135,6 @@ 
	status = "okay";

	clock-frequency = <355000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c11_pins>;



	led-controller@38 {

		compatible = "ti,lm3630a";

		status = "okay";
@@ -168,9 +156,6 @@ 
	status = "okay";

	clock-frequency = <100000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c12_pins>;



	mpu6515@68 {

		compatible = "invensense,mpu6515";

		reg = <0x68>;
@@ -212,9 +197,6 @@ 
&blsp2_uart4 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&blsp2_uart4_pin_a>;



	bluetooth {

		compatible = "brcm,bcm43438-bt";

		max-speed = <3000000>;
@@ -533,8 +515,9 @@ 
	vmmc-supply = <&pm8941_l20>;

	vqmmc-supply = <&pm8941_s3>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc1_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc1_on>;

	pinctrl-1 = <&sdc1_off>;

};



&sdhc_2 {
@@ -545,11 +528,9 @@ 
	vqmmc-supply = <&pm8941_s3>;

	non-removable;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc2_pin_a>;



	#address-cells = <1>;

	#size-cells = <0>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc2_on>;

	pinctrl-1 = <&sdc2_off>;



	bcrmf@1 {

		compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
@@ -563,7 +544,7 @@ 
};



&tlmm {

	sdhc1_pin_a: sdhc1-pin-active {

	sdc1_on: sdc1-on {

		clk {

			pins = "sdc1_clk";

			drive-strength = <16>;
@@ -577,7 +558,7 @@ 
		};

	};



	sdhc2_pin_a: sdhc2-pin-active {

	sdc2_on: sdc2-on {

		clk {

			pins = "sdc2_clk";

			drive-strength = <6>;
@@ -591,54 +572,6 @@ 
		};

	};



	i2c1_pins: i2c1 {

		mux {

			pins = "gpio2", "gpio3";

			function = "blsp_i2c1";



			drive-strength = <2>;

			bias-disable;

		};

	};



	i2c2_pins: i2c2 {

		mux {

			pins = "gpio6", "gpio7";

			function = "blsp_i2c2";



			drive-strength = <2>;

			bias-disable;

		};

	};



	i2c3_pins: i2c3 {

		mux {

			pins = "gpio10", "gpio11";

			function = "blsp_i2c3";

			drive-strength = <2>;

			bias-disable;

		};

	};



	i2c11_pins: i2c11 {

		mux {

			pins = "gpio83", "gpio84";

			function = "blsp_i2c11";



			drive-strength = <2>;

			bias-disable;

		};

	};



	i2c12_pins: i2c12 {

		mux {

			pins = "gpio87", "gpio88";

			function = "blsp_i2c12";

			drive-strength = <2>;

			bias-disable;

		};

	};



	mpu6515_pin: mpu6515 {

		irq {

			pins = "gpio73";
@@ -693,38 +626,4 @@ 
			function = "gpio";

		};

	};



	blsp2_uart4_pin_a: blsp2-uart4-pin-active {

		tx {

			pins = "gpio53";

			function = "blsp_uart10";



			drive-strength = <2>;

			bias-disable;

		};



		rx {

			pins = "gpio54";

			function = "blsp_uart10";



			drive-strength = <2>;

			bias-pull-up;

		};



		cts {

			pins = "gpio55";

			function = "blsp_uart10";



			drive-strength = <2>;

			bias-pull-up;

		};



		rts {

			pins = "gpio56";

			function = "blsp_uart10";



			drive-strength = <2>;

			bias-disable;

		};

	};

};

arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi

+15 −48
Original line number Diff line number Diff line
@@ -55,9 +55,6 @@ 
	status = "okay";

	clock-frequency = <355000>;



	pinctrl-names = "default";

	pinctrl-0 = <&i2c2_pins>;



	synaptics@2c {

		compatible = "syna,rmi4-i2c";

		reg = <0x2c>;
@@ -90,9 +87,6 @@ 


&blsp1_uart2 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&blsp1_uart2_pin_a>;

};



&blsp2_dma {
@@ -350,8 +344,9 @@ 
	vmmc-supply = <&pm8941_l20>;

	vqmmc-supply = <&pm8941_s3>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc1_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc1_on>;

	pinctrl-1 = <&sdc1_off>;

};



&sdhc_2 {
@@ -362,8 +357,9 @@ 


	cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;



	pinctrl-names = "default";

	pinctrl-0 = <&sdhc2_pin_a>, <&sdhc2_cd_pin_a>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&sdc2_on>;

	pinctrl-1 = <&sdc2_off>;

};



&smbb {
@@ -389,35 +385,7 @@ 
		};

	};



	blsp1_uart2_pin_a: blsp1-uart2-pin-active {

		rx {

			pins = "gpio5";

			function = "blsp_uart2";



			drive-strength = <2>;

			bias-pull-up;

		};



		tx {

			pins = "gpio4";

			function = "blsp_uart2";



			drive-strength = <4>;

			bias-disable;

		};

	};



	i2c2_pins: i2c2 {

		mux {

			pins = "gpio6", "gpio7";

			function = "blsp_i2c2";



			drive-strength = <2>;

			bias-disable;

		};

	};



	sdhc1_pin_a: sdhc1-pin-active {

	sdc1_on: sdc1-on {

		clk {

			pins = "sdc1_clk";

			drive-strength = <16>;
@@ -431,15 +399,7 @@ 
		};

	};



	sdhc2_cd_pin_a: sdhc2-cd-pin-active {

		pins = "gpio62";

		function = "gpio";



		drive-strength = <2>;

		bias-disable;

		};



	sdhc2_pin_a: sdhc2-pin-active {

	sdc2_on: sdc-on {

		clk {

			pins = "sdc2_clk";

			drive-strength = <10>;
@@ -451,5 +411,12 @@ 
			drive-strength = <6>;

			bias-pull-up;

		};



		cd {

			pins = "gpio62";

			function = "gpio";

			drive-strength = <2>;

			bias-disable;

		};

	};

};

arch/arm/boot/dts/qcom-msm8974.dtsi

+243 −2
Original line number Diff line number Diff line
@@ -466,6 +466,9 @@ 
			clock-names = "core", "iface", "xo";

			bus-width = <4>;



			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

		};
@@ -482,6 +485,9 @@ 
			clock-names = "core", "iface", "xo";

			bus-width = <4>;



			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

		};
@@ -510,6 +516,9 @@ 
			interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp1_i2c1_default>;

			pinctrl-1 = <&blsp1_i2c1_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};
@@ -521,6 +530,9 @@ 
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp1_i2c2_default>;

			pinctrl-1 = <&blsp1_i2c2_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};
@@ -532,6 +544,9 @@ 
			interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp1_i2c3_default>;

			pinctrl-1 = <&blsp1_i2c3_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};
@@ -543,6 +558,9 @@ 
			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp1_i2c6_default>;

			pinctrl-1 = <&blsp1_i2c6_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};
@@ -591,6 +609,9 @@ 
			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp2_i2c2_default>;

			pinctrl-1 = <&blsp2_i2c2_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};
@@ -602,10 +623,13 @@ 
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;

			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

			dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;

			dma-names = "tx", "rx";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp2_i2c5_default>;

			pinctrl-1 = <&blsp2_i2c5_sleep>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		blsp2_i2c6: i2c@f9968000 {
@@ -1185,6 +1209,223 @@ 
			interrupt-controller;

			#interrupt-cells = <2>;

			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;



			sdc1_off: sdc1-off {

				clk {

					pins = "sdc1_clk";

					bias-disable;

					drive-strength = <2>;

				};



				cmd {

					pins = "sdc1_cmd";

					bias-pull-up;

					drive-strength = <2>;

				};



				data {

					pins = "sdc1_data";

					bias-pull-up;

					drive-strength = <2>;

				};

			};



			sdc2_off: sdc2-off {

				clk {

					pins = "sdc2_clk";

					bias-disable;

					drive-strength = <2>;

				};



				cmd {

					pins = "sdc2_cmd";

					bias-pull-up;

					drive-strength = <2>;

				};



				data {

					pins = "sdc2_data";

					bias-pull-up;

					drive-strength = <2>;

				};



				cd {

					pins = "gpio54";

					bias-disable;

					drive-strength = <2>;

				};

			};



			blsp1_uart2_active: blsp1-uart2-active {

				rx {

					pins = "gpio5";

					function = "blsp_uart2";

					drive-strength = <2>;

					bias-pull-up;

				};



				tx {

					pins = "gpio4";

					function = "blsp_uart2";

					drive-strength = <4>;

					bias-disable;

				};

			};



			blsp2_uart1_active: blsp2-uart1-active {

				tx-rts {

					pins = "gpio41", "gpio44";

					function = "blsp_uart7";

					drive-strength = <2>;

					bias-disable;

				};



				rx-cts {

					pins = "gpio42", "gpio43";

					function = "blsp_uart7";

					drive-strength = <2>;

					bias-pull-up;

				};

			};



			blsp2_uart1_sleep: blsp2-uart1-sleep {

				pins = "gpio41", "gpio42", "gpio43", "gpio44";

				function = "gpio";

				drive-strength = <2>;

				bias-pull-down;

			};



			blsp2_uart4_active: blsp2-uart4-active {

				tx-rts {

					pins = "gpio53", "gpio56";

					function = "blsp_uart10";

					drive-strength = <2>;

					bias-disable;

				};



				rx-cts {

					pins = "gpio54", "gpio55";

					function = "blsp_uart10";

					drive-strength = <2>;

					bias-pull-up;

				};

			};



			blsp1_i2c1_default: blsp1-i2c1-default {

				pins = "gpio2", "gpio3";

				function = "blsp_i2c1";

				drive-strength = <2>;

				bias-disable;

			};



			blsp1_i2c1_sleep: blsp1-i2c1-sleep {

				pins = "gpio2", "gpio3";

				function = "blsp_i2c1";

				drive-strength = <2>;

				bias-pull-up;

			};



			blsp1_i2c2_default: blsp1-i2c2-default {

				pins = "gpio6", "gpio7";

				function = "blsp_i2c2";

				drive-strength = <2>;

				bias-disable;

			};



			blsp1_i2c2_sleep: blsp1-i2c2-sleep {

				pins = "gpio6", "gpio7";

				function = "blsp_i2c2";

				drive-strength = <2>;

				bias-pull-up;

			};



			blsp1_i2c3_default: blsp1-i2c3-default {

				pins = "gpio10", "gpio11";

				function = "blsp_i2c3";

				drive-strength = <2>;

				bias-disable;

			};



			blsp1_i2c3_sleep: blsp1-i2c3-sleep {

				pins = "gpio10", "gpio11";

				function = "blsp_i2c3";

				drive-strength = <2>;

				bias-pull-up;

			};



			/* BLSP1_I2C4 info is missing */



			/* BLSP1_I2C5 info is missing */



			blsp1_i2c6_default: blsp1-i2c6-default {

				pins = "gpio29", "gpio30";

				function = "blsp_i2c6";

				drive-strength = <2>;

				bias-disable;

			};



			blsp1_i2c6_sleep: blsp1-i2c6-sleep {

				pins = "gpio29", "gpio30";

				function = "blsp_i2c6";

				drive-strength = <2>;

				bias-pull-up;

			};

			/* 6 interfaces per QUP, BLSP2 indexes are numbered (n)+6 */



			/* BLSP2_I2C1 info is missing */



			blsp2_i2c2_default: blsp2-i2c2-default {

				pins = "gpio47", "gpio48";

				function = "blsp_i2c8";

				drive-strength = <2>;

				bias-disable;

			};



			blsp2_i2c2_sleep: blsp2-i2c2-sleep {

				pins = "gpio47", "gpio48";

				function = "blsp_i2c8";

				drive-strength = <2>;

				bias-pull-up;

			};



			/* BLSP2_I2C3 info is missing */



			/* BLSP2_I2C4 info is missing */



			blsp2_i2c5_default: blsp2-i2c5-default {

				pins = "gpio83", "gpio84";

				function = "blsp_i2c11";

				drive-strength = <2>;

				bias-disable;

			};



			blsp2_i2c5_sleep: blsp2-i2c5-sleep {

				pins = "gpio83", "gpio84";

				function = "blsp_i2c11";

				drive-strength = <2>;

				bias-pull-up;

			};



			/* BLSP2_I2C6 info is missing - nobody uses it though? */



			spi8_default: spi8_default {

				mosi {

					pins = "gpio45";

					function = "blsp_spi8";

				};

				miso {

					pins = "gpio46";

					function = "blsp_spi8";

				};

				cs {

					pins = "gpio47";

					function = "blsp_spi8";

				};

				clk {

					pins = "gpio48";

					function = "blsp_spi8";

				};

			};

		};



		mmcc: clock-controller@fd8c0000 {