Commit 1df6b9b0 authored by Steve Su's avatar Steve Su Committed by Alex Deucher
Browse files

drm/amd/display: Fix gpio port mapping issue



[Why]
1. Port of gpio has different mapping.

[How]
1. Add a dummy entry in mapping table.
2. Fix incorrect mask bit field access.

Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: default avatarSteve Su <steve.su@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 98f9229f
Loading
Loading
Loading
Loading
+14 −0
Original line number Diff line number Diff line
@@ -107,6 +107,13 @@ static const struct ddc_registers ddc_data_regs_dcn[] = {
	ddc_data_regs_dcn2(3),
	ddc_data_regs_dcn2(4),
	ddc_data_regs_dcn2(5),
	{
		// add a dummy entry for cases no such port
		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
		.ddc_setup = 0,
		.phy_aux_cntl = 0,
		.dc_gpio_aux_ctrl_5 = 0
	},
	{
			DDC_GPIO_VGA_REG_LIST(DATA),
			.ddc_setup = 0,
@@ -121,6 +128,13 @@ static const struct ddc_registers ddc_clk_regs_dcn[] = {
	ddc_clk_regs_dcn2(3),
	ddc_clk_regs_dcn2(4),
	ddc_clk_regs_dcn2(5),
	{
		// add a dummy entry for cases no such port
		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
		.ddc_setup = 0,
		.phy_aux_cntl = 0,
		.dc_gpio_aux_ctrl_5 = 0
	},
	{
			DDC_GPIO_VGA_REG_LIST(CLK),
			.ddc_setup = 0,
+6 −3
Original line number Diff line number Diff line
@@ -94,11 +94,14 @@ static enum gpio_result set_config(
		 * is required for detection of AUX mode */
		if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) {
			if (!ddc_data_pd_en || !ddc_clk_pd_en) {

				if (hw_gpio->base.en == GPIO_DDC_LINE_DDC_VGA) {
					// bit 4 of mask has different usage in some cases
					REG_SET(gpio.MASK_reg, regval, DC_GPIO_DDC1DATA_PD_EN, 1);
				} else {
					REG_SET_2(gpio.MASK_reg, regval,
						DC_GPIO_DDC1DATA_PD_EN, 1,
						DC_GPIO_DDC1CLK_PD_EN, 1);

				}
				if (config_data->type ==
						GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
					msleep(3);