Commit 1db536f9 authored by Vincent Whitchurch's avatar Vincent Whitchurch Committed by Greg Kroah-Hartman
Browse files

tty: serial: samsung: Add ARTPEC-8 support 



Add support for the UART block on the ARTPEC-8 SoC.  This is closely
related to the variants used on the Exynos chips.  The register layout
is identical to Exynos850 et al but the fifo size is different (64 bytes
in each direction for all instances).

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarVincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20220311094515.3223023-3-vincent.whitchurch@axis.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 02a64ef6

drivers/tty/serial/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ config SERIAL_CLPS711X_CONSOLE 


config SERIAL_SAMSUNG

	tristate "Samsung SoC serial support"

	depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || COMPILE_TEST

	depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || ARCH_ARTPEC || COMPILE_TEST

	select SERIAL_CORE

	help

	  Support for the on-chip UARTs on the Samsung

drivers/tty/serial/samsung_tty.c

+37 −0
Original line number Diff line number Diff line
@@ -2825,6 +2825,36 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { 
#define S5L_SERIAL_DRV_DATA NULL

#endif



#if defined(CONFIG_ARCH_ARTPEC)

static const struct s3c24xx_serial_drv_data artpec8_serial_drv_data = {

	.info = {

		.name		= "Axis ARTPEC-8 UART",

		.type		= TYPE_S3C6400,

		.port_type	= PORT_S3C6400,

		.fifosize	= 64,

		.has_divslot	= 1,

		.rx_fifomask	= S5PV210_UFSTAT_RXMASK,

		.rx_fifoshift	= S5PV210_UFSTAT_RXSHIFT,

		.rx_fifofull	= S5PV210_UFSTAT_RXFULL,

		.tx_fifofull	= S5PV210_UFSTAT_TXFULL,

		.tx_fifomask	= S5PV210_UFSTAT_TXMASK,

		.tx_fifoshift	= S5PV210_UFSTAT_TXSHIFT,

		.def_clk_sel	= S3C2410_UCON_CLKSEL0,

		.num_clks	= 1,

		.clksel_mask	= 0,

		.clksel_shift	= 0,

	},

	.def_cfg = {

		.ucon		= S5PV210_UCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.has_fracval	= 1,

	}

};

#define ARTPEC8_SERIAL_DRV_DATA (&artpec8_serial_drv_data)

#else

#define ARTPEC8_SERIAL_DRV_DATA (NULL)

#endif



static const struct platform_device_id s3c24xx_serial_driver_ids[] = {

	{

		.name		= "s3c2410-uart",
@@ -2853,6 +2883,9 @@ static const struct platform_device_id s3c24xx_serial_driver_ids[] = { 
	}, {

		.name		= "exynos850-uart",

		.driver_data	= (kernel_ulong_t)EXYNOS850_SERIAL_DRV_DATA,

	}, {

		.name		= "artpec8-uart",

		.driver_data	= (kernel_ulong_t)ARTPEC8_SERIAL_DRV_DATA,

	},

	{ },

};
@@ -2878,6 +2911,8 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = { 
		.data = S5L_SERIAL_DRV_DATA },

	{ .compatible = "samsung,exynos850-uart",

		.data = EXYNOS850_SERIAL_DRV_DATA },

	{ .compatible = "axis,artpec8-uart",

		.data = ARTPEC8_SERIAL_DRV_DATA },

	{},

};

MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match);
@@ -3056,6 +3091,8 @@ OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart", 
			s5pv210_early_console_setup);

OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart",

			s5pv210_early_console_setup);

OF_EARLYCON_DECLARE(artpec8, "axis,artpec8-uart",

			s5pv210_early_console_setup);



/* Apple S5L */

static int __init apple_s5l_early_console_setup(struct earlycon_device *device,