Commit 1d9ce1cb authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Define the "unmodified vblank" interrupt bit 



On TGL+ the normal "start of vblank" interrupt is the pipe's
(potentially delayed) version. Add the new bit for the
transcoder's "unmodified" vblank so I don't have to dig it
out from bspec every time.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230213225258.2127-7-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 998894d5

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -5387,6 +5387,7 @@ 
#define  GEN8_PIPE_CDCLK_CRC_DONE	(1 << 28)

#define  XELPD_PIPE_SOFT_UNDERRUN	(1 << 22)

#define  XELPD_PIPE_HARD_UNDERRUN	(1 << 21)

#define  GEN12_PIPE_VBLANK_UNMOD	(1 << 19)

#define  GEN8_PIPE_CURSOR_FAULT		(1 << 10)

#define  GEN8_PIPE_SPRITE_FAULT		(1 << 9)

#define  GEN8_PIPE_PRIMARY_FAULT	(1 << 8)