Commit 1d9a770b authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: arm: Convert QEMU fw-cfg to DT schema 



Convert the QEMU fw-cfg binding to DT schema format. As this binding is
also used on Risc-V now, drop any architecture references and move to a
common location. The fw-cfg interface has also gained some DMA support
which is coherent, so add the missing 'dma-coherent'.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: default avatarLaszlo Ersek <lersek@redhat.com>
Link: https://lore.kernel.org/r/20220310013552.549590-1-robh@kernel.org
parent 2a4013c0

Documentation/devicetree/bindings/arm/fw-cfg.txt

deleted100644 → 0
+0 −38
Original line number Diff line number Diff line 
* QEMU Firmware Configuration bindings for ARM



QEMU's arm-softmmu and aarch64-softmmu emulation / virtualization targets

provide the following Firmware Configuration interface on the "virt" machine

type:



- A write-only, 16-bit wide selector (or control) register,

- a read-write, 64-bit wide data register.



QEMU exposes the control and data register to ARM guests as memory mapped

registers; their location is communicated to the guest's UEFI firmware in the

DTB that QEMU places at the bottom of the guest's DRAM.



The authoritative guest-side hardware interface documentation to the fw_cfg

device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.





Required properties:



- compatible: "qemu,fw-cfg-mmio".



- reg: the MMIO region used by the device.

  * Bytes 0x0 to 0x7 cover the data register.

  * Bytes 0x8 to 0x9 cover the selector register.

  * Further registers may be appended to the region in case of future interface

    revisions / feature bits.



Example:



/ {

	#size-cells = <0x2>;

	#address-cells = <0x2>;



	fw-cfg@9020000 {

		compatible = "qemu,fw-cfg-mmio";

		reg = <0x0 0x9020000 0x0 0xa>;

	};

};

Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml

0 → 100644
+54 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/firmware/qemu,fw-cfg-mmio.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: QEMU Firmware Configuration bindings



maintainers:

  - Rob Herring <robh@kernel.org>



description: |

  Various QEMU emulation / virtualization targets provide the following

  Firmware Configuration interface on the "virt" machine type:



  - A write-only, 16-bit wide selector (or control) register,

  - a read-write, 64-bit wide data register.



  QEMU exposes the control and data register to guests as memory mapped

  registers; their location is communicated to the guest's UEFI firmware in the

  DTB that QEMU places at the bottom of the guest's DRAM.



  The authoritative guest-side hardware interface documentation to the fw_cfg

  device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.





properties:

  compatible:

    const: qemu,fw-cfg-mmio



  reg:

    maxItems: 1

    description: |

      * Bytes 0x0 to 0x7 cover the data register.

      * Bytes 0x8 to 0x9 cover the selector register.

      * Further registers may be appended to the region in case of future interface

        revisions / feature bits.



  dma-coherent: true



required:

  - compatible

  - reg



additionalProperties: false



examples:

  - |



    fw-cfg@9020000 {

        compatible = "qemu,fw-cfg-mmio";

        reg = <0x9020000 0xa>;

    };

...