Unverified Commit 1d7c9d09 authored by Damien Le Moal's avatar Damien Le Moal Committed by Palmer Dabbelt
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dt-bindings: reset: Document canaan,k210-rst bindings



Document the device tree bindings for the Canaan Kendryte K210 SoC
reset controller driver in
Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header
file include/dt-bindings/reset/k210-rst.h is added to define all
possible reset lines of the SoC.

Signed-off-by: default avatarDamien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent 23fb08e7
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Canaan Kendryte K210 Reset Controller Device Tree Bindings

maintainers:
  - Damien Le Moal <damien.lemoal@wdc.com>

description: |
  Canaan Kendryte K210 reset controller driver which supports the SoC
  system controller supplied reset registers for the various peripherals
  of the SoC. The K210 reset controller node must be defined as a child
  node of the K210 system controller node.

  See also:
  - dt-bindings/reset/k210-rst.h

properties:
  compatible:
    const: canaan,k210-rst

  '#reset-cells':
    const: 1

required:
  - '#reset-cells'
  - compatible

additionalProperties: false

examples:
  - |
    #include <dt-bindings/reset/k210-rst.h>
    sysrst: reset-controller {
      compatible = "canaan,k210-rst";
      #reset-cells = <1>;
    };
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
 */
#ifndef RESET_K210_SYSCTL_H
#define RESET_K210_SYSCTL_H

/*
 * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits.
 * Taken from Kendryte SDK (kendryte-standalone-sdk).
 */
#define K210_RST_ROM	0
#define K210_RST_DMA	1
#define K210_RST_AI	2
#define K210_RST_DVP	3
#define K210_RST_FFT	4
#define K210_RST_GPIO	5
#define K210_RST_SPI0	6
#define K210_RST_SPI1	7
#define K210_RST_SPI2	8
#define K210_RST_SPI3	9
#define K210_RST_I2S0	10
#define K210_RST_I2S1	11
#define K210_RST_I2S2	12
#define K210_RST_I2C0	13
#define K210_RST_I2C1	14
#define K210_RST_I2C2	15
#define K210_RST_UART1	16
#define K210_RST_UART2	17
#define K210_RST_UART3	18
#define K210_RST_AES	19
#define K210_RST_FPIOA	20
#define K210_RST_TIMER0	21
#define K210_RST_TIMER1	22
#define K210_RST_TIMER2	23
#define K210_RST_WDT0	24
#define K210_RST_WDT1	25
#define K210_RST_SHA	26
#define K210_RST_RTC	29

#endif /* RESET_K210_SYSCTL_H */