Loading arch/mips/kernel/branch.c +7 −3 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include <asm/branch.h> #include <asm/cpu.h> #include <asm/cpu-features.h> #include <asm/fpu.h> #include <asm/inst.h> #include <asm/ptrace.h> #include <asm/uaccess.h> Loading Loading @@ -161,10 +162,13 @@ int __compute_return_epc(struct pt_regs *regs) * And now the FPA/cp1 branch instructions. */ case cop1_op: if (!cpu_has_fpu) fcr31 = current->thread.fpu.soft.fcr31; else preempt_disable(); if (is_fpu_owner()) asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); else fcr31 = current->thread.fpu.hard.fcr31; preempt_enable(); bit = (insn.i_format.rt >> 2); bit += (bit != 0); bit += 23; Loading include/asm-mips/fpu.h +7 −2 Original line number Diff line number Diff line Loading @@ -80,9 +80,14 @@ do { \ #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) static inline int __is_fpu_owner(void) { return test_thread_flag(TIF_USEDFPU); } static inline int is_fpu_owner(void) { return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); return cpu_has_fpu && __is_fpu_owner(); } static inline void own_fpu(void) Loading Loading @@ -127,7 +132,7 @@ static inline void restore_fp(struct task_struct *tsk) static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) { if (cpu_has_fpu) { if ((tsk == current) && is_fpu_owner()) if ((tsk == current) && __is_fpu_owner()) _save_fp(current); return tsk->thread.fpu.hard.fpr; } Loading Loading
arch/mips/kernel/branch.c +7 −3 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include <asm/branch.h> #include <asm/cpu.h> #include <asm/cpu-features.h> #include <asm/fpu.h> #include <asm/inst.h> #include <asm/ptrace.h> #include <asm/uaccess.h> Loading Loading @@ -161,10 +162,13 @@ int __compute_return_epc(struct pt_regs *regs) * And now the FPA/cp1 branch instructions. */ case cop1_op: if (!cpu_has_fpu) fcr31 = current->thread.fpu.soft.fcr31; else preempt_disable(); if (is_fpu_owner()) asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); else fcr31 = current->thread.fpu.hard.fcr31; preempt_enable(); bit = (insn.i_format.rt >> 2); bit += (bit != 0); bit += 23; Loading
include/asm-mips/fpu.h +7 −2 Original line number Diff line number Diff line Loading @@ -80,9 +80,14 @@ do { \ #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) static inline int __is_fpu_owner(void) { return test_thread_flag(TIF_USEDFPU); } static inline int is_fpu_owner(void) { return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); return cpu_has_fpu && __is_fpu_owner(); } static inline void own_fpu(void) Loading Loading @@ -127,7 +132,7 @@ static inline void restore_fp(struct task_struct *tsk) static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) { if (cpu_has_fpu) { if ((tsk == current) && is_fpu_owner()) if ((tsk == current) && __is_fpu_owner()) _save_fp(current); return tsk->thread.fpu.hard.fpr; } Loading