Loading Documentation/admin-guide/kernel-parameters.txt +4 −8 Original line number Diff line number Diff line Loading @@ -290,10 +290,7 @@ amd_iommu= [HW,X86-64] Pass parameters to the AMD IOMMU driver in the system. Possible values are: fullflush - enable flushing of IO/TLB entries when they are unmapped. Otherwise they are flushed before they will be reused, which is a lot of faster fullflush - Deprecated, equivalent to iommu.strict=1 off - do not initialize any AMD IOMMU found in the system force_isolation - Force device isolation for all Loading Loading @@ -1944,9 +1941,7 @@ this case, gfx device will use physical address for DMA. strict [Default Off] With this option on every unmap_single operation will result in a hardware IOTLB flush operation as opposed to batching them for performance. Deprecated, equivalent to iommu.strict=1. sp_off [Default Off] By default, super page will be supported if Intel IOMMU has the capability. With this option, super page will Loading Loading @@ -2047,9 +2042,10 @@ throughput at the cost of reduced device isolation. Will fall back to strict mode if not supported by the relevant IOMMU driver. 1 - Strict mode (default). 1 - Strict mode. DMA unmap operations invalidate IOMMU hardware TLBs synchronously. unset - Use value of CONFIG_IOMMU_DEFAULT_{LAZY,STRICT}. Note: on x86, the default behaviour depends on the equivalent driver-specific parameters, but a strict mode explicitly specified by either method takes Loading drivers/iommu/Kconfig +41 −0 Original line number Diff line number Diff line Loading @@ -90,6 +90,47 @@ config IOMMU_DEFAULT_PASSTHROUGH If unsure, say N here. choice prompt "IOMMU default DMA IOTLB invalidation mode" depends on IOMMU_DMA default IOMMU_DEFAULT_LAZY if (AMD_IOMMU || INTEL_IOMMU) default IOMMU_DEFAULT_STRICT help This option allows an IOMMU DMA IOTLB invalidation mode to be chosen at build time, to override the default mode of each ARCH, removing the need to pass in kernel parameters through command line. It is still possible to provide common boot params to override this config. If unsure, keep the default. config IOMMU_DEFAULT_STRICT bool "strict" help For every IOMMU DMA unmap operation, the flush operation of IOTLB and the free operation of IOVA are guaranteed to be done in the unmap function. config IOMMU_DEFAULT_LAZY bool "lazy" help Support lazy mode, where for every IOMMU DMA unmap operation, the flush operation of IOTLB and the free operation of IOVA are deferred. They are only guaranteed to be done before the related IOVA will be reused. The isolation provided in this mode is not as secure as STRICT mode, such that a vulnerable time window may be created between the DMA unmap and the mappings cached in the IOMMU IOTLB or device TLB finally being invalidated, where the device could still access the memory which has already been unmapped by the device driver. However this mode may provide better performance in high throughput scenarios, and is still considerably more secure than passthrough mode or no IOMMU. endchoice config OF_IOMMU def_bool y depends on OF && IOMMU_API Loading drivers/iommu/amd/amd_iommu_types.h +0 −6 Original line number Diff line number Diff line Loading @@ -779,12 +779,6 @@ extern u16 amd_iommu_last_bdf; /* allocation bitmap for domain ids */ extern unsigned long *amd_iommu_pd_alloc_bitmap; /* * If true, the addresses will be flushed on unmap time, not when * they are reused */ extern bool amd_iommu_unmap_flush; /* Smallest max PASID supported by any IOMMU in the system */ extern u32 amd_iommu_max_pasid; Loading drivers/iommu/amd/init.c +4 −3 Original line number Diff line number Diff line Loading @@ -161,7 +161,6 @@ u16 amd_iommu_last_bdf; /* largest PCI device id we have to handle */ LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings we find in ACPI */ bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the system */ Loading Loading @@ -3103,8 +3102,10 @@ static int __init parse_amd_iommu_intr(char *str) static int __init parse_amd_iommu_options(char *str) { for (; *str; ++str) { if (strncmp(str, "fullflush", 9) == 0) amd_iommu_unmap_flush = true; if (strncmp(str, "fullflush", 9) == 0) { pr_warn("amd_iommu=fullflush deprecated; use iommu.strict=1 instead\n"); iommu_set_dma_strict(); } if (strncmp(str, "force_enable", 12) == 0) amd_iommu_force_enable = true; if (strncmp(str, "off", 3) == 0) Loading drivers/iommu/amd/io_pgtable.c +0 −3 Original line number Diff line number Diff line Loading @@ -493,9 +493,6 @@ static phys_addr_t iommu_v1_iova_to_phys(struct io_pgtable_ops *ops, unsigned lo unsigned long offset_mask, pte_pgsize; u64 *pte, __pte; if (pgtable->mode == PAGE_MODE_NONE) return iova; pte = fetch_pte(pgtable, iova, &pte_pgsize); if (!pte || !IOMMU_PTE_PRESENT(*pte)) Loading Loading
Documentation/admin-guide/kernel-parameters.txt +4 −8 Original line number Diff line number Diff line Loading @@ -290,10 +290,7 @@ amd_iommu= [HW,X86-64] Pass parameters to the AMD IOMMU driver in the system. Possible values are: fullflush - enable flushing of IO/TLB entries when they are unmapped. Otherwise they are flushed before they will be reused, which is a lot of faster fullflush - Deprecated, equivalent to iommu.strict=1 off - do not initialize any AMD IOMMU found in the system force_isolation - Force device isolation for all Loading Loading @@ -1944,9 +1941,7 @@ this case, gfx device will use physical address for DMA. strict [Default Off] With this option on every unmap_single operation will result in a hardware IOTLB flush operation as opposed to batching them for performance. Deprecated, equivalent to iommu.strict=1. sp_off [Default Off] By default, super page will be supported if Intel IOMMU has the capability. With this option, super page will Loading Loading @@ -2047,9 +2042,10 @@ throughput at the cost of reduced device isolation. Will fall back to strict mode if not supported by the relevant IOMMU driver. 1 - Strict mode (default). 1 - Strict mode. DMA unmap operations invalidate IOMMU hardware TLBs synchronously. unset - Use value of CONFIG_IOMMU_DEFAULT_{LAZY,STRICT}. Note: on x86, the default behaviour depends on the equivalent driver-specific parameters, but a strict mode explicitly specified by either method takes Loading
drivers/iommu/Kconfig +41 −0 Original line number Diff line number Diff line Loading @@ -90,6 +90,47 @@ config IOMMU_DEFAULT_PASSTHROUGH If unsure, say N here. choice prompt "IOMMU default DMA IOTLB invalidation mode" depends on IOMMU_DMA default IOMMU_DEFAULT_LAZY if (AMD_IOMMU || INTEL_IOMMU) default IOMMU_DEFAULT_STRICT help This option allows an IOMMU DMA IOTLB invalidation mode to be chosen at build time, to override the default mode of each ARCH, removing the need to pass in kernel parameters through command line. It is still possible to provide common boot params to override this config. If unsure, keep the default. config IOMMU_DEFAULT_STRICT bool "strict" help For every IOMMU DMA unmap operation, the flush operation of IOTLB and the free operation of IOVA are guaranteed to be done in the unmap function. config IOMMU_DEFAULT_LAZY bool "lazy" help Support lazy mode, where for every IOMMU DMA unmap operation, the flush operation of IOTLB and the free operation of IOVA are deferred. They are only guaranteed to be done before the related IOVA will be reused. The isolation provided in this mode is not as secure as STRICT mode, such that a vulnerable time window may be created between the DMA unmap and the mappings cached in the IOMMU IOTLB or device TLB finally being invalidated, where the device could still access the memory which has already been unmapped by the device driver. However this mode may provide better performance in high throughput scenarios, and is still considerably more secure than passthrough mode or no IOMMU. endchoice config OF_IOMMU def_bool y depends on OF && IOMMU_API Loading
drivers/iommu/amd/amd_iommu_types.h +0 −6 Original line number Diff line number Diff line Loading @@ -779,12 +779,6 @@ extern u16 amd_iommu_last_bdf; /* allocation bitmap for domain ids */ extern unsigned long *amd_iommu_pd_alloc_bitmap; /* * If true, the addresses will be flushed on unmap time, not when * they are reused */ extern bool amd_iommu_unmap_flush; /* Smallest max PASID supported by any IOMMU in the system */ extern u32 amd_iommu_max_pasid; Loading
drivers/iommu/amd/init.c +4 −3 Original line number Diff line number Diff line Loading @@ -161,7 +161,6 @@ u16 amd_iommu_last_bdf; /* largest PCI device id we have to handle */ LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings we find in ACPI */ bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the system */ Loading Loading @@ -3103,8 +3102,10 @@ static int __init parse_amd_iommu_intr(char *str) static int __init parse_amd_iommu_options(char *str) { for (; *str; ++str) { if (strncmp(str, "fullflush", 9) == 0) amd_iommu_unmap_flush = true; if (strncmp(str, "fullflush", 9) == 0) { pr_warn("amd_iommu=fullflush deprecated; use iommu.strict=1 instead\n"); iommu_set_dma_strict(); } if (strncmp(str, "force_enable", 12) == 0) amd_iommu_force_enable = true; if (strncmp(str, "off", 3) == 0) Loading
drivers/iommu/amd/io_pgtable.c +0 −3 Original line number Diff line number Diff line Loading @@ -493,9 +493,6 @@ static phys_addr_t iommu_v1_iova_to_phys(struct io_pgtable_ops *ops, unsigned lo unsigned long offset_mask, pte_pgsize; u64 *pte, __pte; if (pgtable->mode == PAGE_MODE_NONE) return iova; pte = fetch_pte(pgtable, iova, &pte_pgsize); if (!pte || !IOMMU_PTE_PRESENT(*pte)) Loading