Commit 1d054c9b authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm: Drop priv->lastctx 



cur_ctx_seqno already does the same thing, but handles the edge cases
where a refcnt'd context can live after lastclose.  So let's not have
two ways to do the same thing.

Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarAkhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/20211109181117.591148-3-robdclark@gmail.com


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent d8c00a81

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+1 −2
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ static bool a2xx_idle(struct msm_gpu *gpu); 


static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

{

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct msm_ringbuffer *ring = submit->ring;

	unsigned int i;
@@ -23,7 +22,7 @@ static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			/* ignore if there has not been a ctx switch: */

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+1 −2
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ static bool a3xx_idle(struct msm_gpu *gpu); 


static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

{

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct msm_ringbuffer *ring = submit->ring;

	unsigned int i;
@@ -41,7 +40,7 @@ static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			/* ignore if there has not been a ctx switch: */

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+1 −2
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ static bool a4xx_idle(struct msm_gpu *gpu); 


static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

{

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct msm_ringbuffer *ring = submit->ring;

	unsigned int i;
@@ -35,7 +34,7 @@ static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			/* ignore if there has not been a ctx switch: */

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+3 −5
Original line number Diff line number Diff line
@@ -65,7 +65,6 @@ void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, 


static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit)

{

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct msm_ringbuffer *ring = submit->ring;

	struct msm_gem_object *obj;

	uint32_t *ptr, dwords;
@@ -76,7 +75,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit 
		case MSM_SUBMIT_CMD_IB_TARGET_BUF:

			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:
@@ -126,12 +125,11 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct msm_ringbuffer *ring = submit->ring;

	unsigned int i, ibs = 0;



	if (IS_ENABLED(CONFIG_DRM_MSM_GPU_SUDO) && submit->in_rb) {

		priv->lastctx = NULL;

		gpu->cur_ctx_seqno = 0;

		a5xx_submit_in_rb(gpu, submit);

		return;

	}
@@ -166,7 +164,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
		case MSM_SUBMIT_CMD_IB_TARGET_BUF:

			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+3 −6
Original line number Diff line number Diff line
@@ -106,7 +106,7 @@ static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu, 
	u32 asid;

	u64 memptr = rbmemptr(ring, ttbr0);



	if (ctx->seqno == a6xx_gpu->cur_ctx_seqno)

	if (ctx->seqno == a6xx_gpu->base.base.cur_ctx_seqno)

		return;



	if (msm_iommu_pagetable_params(ctx->aspace->mmu, &ttbr, &asid))
@@ -138,14 +138,11 @@ static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu, 


	OUT_PKT7(ring, CP_EVENT_WRITE, 1);

	OUT_RING(ring, 0x31);



	a6xx_gpu->cur_ctx_seqno = ctx->seqno;

}



static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

{

	unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT;

	struct msm_drm_private *priv = gpu->dev->dev_private;

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

	struct msm_ringbuffer *ring = submit->ring;
@@ -177,7 +174,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
		case MSM_SUBMIT_CMD_IB_TARGET_BUF:

			break;

		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:

			if (priv->lastctx == submit->queue->ctx)

			if (gpu->cur_ctx_seqno == submit->queue->ctx->seqno)

				break;

			fallthrough;

		case MSM_SUBMIT_CMD_BUF:
@@ -1081,7 +1078,7 @@ static int hw_init(struct msm_gpu *gpu) 
	/* Always come up on rb 0 */

	a6xx_gpu->cur_ring = gpu->rb[0];



	a6xx_gpu->cur_ctx_seqno = 0;

	gpu->cur_ctx_seqno = 0;



	/* Enable the SQE_to start the CP engine */

	gpu_write(gpu, REG_A6XX_CP_SQE_CNTL, 1);