Commit 1ca6437f authored by Arun Ramadoss's avatar Arun Ramadoss Committed by David S. Miller
Browse files

net: dsa: microchip: move broadcast rate limit to ksz_setup 



This patch move the 10% broadcast protection from the individual setup
to ksz_setup. In the ksz9477, broadcast protection is updated in reset
function.

Signed-off-by: default avatarArun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d2822e68

drivers/net/dsa/microchip/ksz8795.c

+0 −6
Original line number Diff line number Diff line
@@ -1415,12 +1415,6 @@ static int ksz8_setup(struct dsa_switch *ds) 
	if (!ksz_is_ksz88x3(dev))

		ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);



	/* set broadcast storm protection 10% rate */

	regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,

			   BROADCAST_STORM_RATE,

			   (BROADCAST_STORM_VALUE *

			   BROADCAST_STORM_PROT_RATE) / 100);



	for (i = 0; i < (dev->info->num_vlans / 4); i++)

		ksz8_r_vlan_entries(dev, i);

drivers/net/dsa/microchip/ksz8795_reg.h

+0 −10
Original line number Diff line number Diff line
@@ -64,13 +64,9 @@ 
#define SW_FLOW_CTRL			BIT(5)

#define SW_10_MBIT			BIT(4)

#define SW_REPLACE_VID			BIT(3)

#define BROADCAST_STORM_RATE_HI		0x07



#define REG_SW_CTRL_5			0x07



#define BROADCAST_STORM_RATE_LO		0xFF

#define BROADCAST_STORM_RATE		0x07FF



#define REG_SW_CTRL_6			0x08



#define SW_MIB_COUNTER_FLUSH		BIT(7)
@@ -797,12 +793,6 @@ 
#define REG_IND_EEE_GLOB2_LO		0x34

#define REG_IND_EEE_GLOB2_HI		0x35



/* Driver set switch broadcast storm protection at 10% rate. */

#define BROADCAST_STORM_PROT_RATE	10



/* 148,800 frames * 67 ms / 100 */

#define BROADCAST_STORM_VALUE		9969



/**

 * MIB_COUNTER_VALUE			00-00000000-3FFFFFFF

 * MIB_TOTAL_BYTES			00-0000000F-FFFFFFFF

drivers/net/dsa/microchip/ksz9477.c

+0 −6
Original line number Diff line number Diff line
@@ -197,12 +197,6 @@ static int ksz9477_reset_switch(struct ksz_device *dev) 
	ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F);

	ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32);



	/* set broadcast storm protection 10% rate */

	regmap_update_bits(dev->regmap[1], REG_SW_MAC_CTRL_2,

			   BROADCAST_STORM_RATE,

			   (BROADCAST_STORM_VALUE *

			   BROADCAST_STORM_PROT_RATE) / 100);



	data8 = SW_ENABLE_REFCLKO;

	if (dev->synclko_disable)

		data8 = 0;

drivers/net/dsa/microchip/ksz9477_reg.h

+0 −10
Original line number Diff line number Diff line
@@ -276,13 +276,9 @@ 
#define REG_SW_MAC_CTRL_2		0x0332



#define SW_REPLACE_VID			BIT(3)

#define BROADCAST_STORM_RATE_HI		0x07



#define REG_SW_MAC_CTRL_3		0x0333



#define BROADCAST_STORM_RATE_LO		0xFF

#define BROADCAST_STORM_RATE		0x07FF



#define REG_SW_MAC_CTRL_4		0x0334



#define SW_PASS_PAUSE			BIT(3)
@@ -1652,12 +1648,6 @@ 
#define PTP_TRIG_UNIT_M			(BIT(MAX_TRIG_UNIT) - 1)

#define PTP_TS_UNIT_M			(BIT(MAX_TIMESTAMP_UNIT) - 1)



/* Driver set switch broadcast storm protection at 10% rate. */

#define BROADCAST_STORM_PROT_RATE	10



/* 148,800 frames * 67 ms / 100 */

#define BROADCAST_STORM_VALUE		9969



#define KSZ9477_MAX_FRAME_SIZE		9000



#endif /* KSZ9477_REGS_H */

drivers/net/dsa/microchip/ksz_common.c

+19 −0
Original line number Diff line number Diff line
@@ -153,6 +153,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x02,

		.broadcast_ctrl_reg =  0x06,

		.supports_mii = {false, false, false, false, true},

		.supports_rmii = {false, false, false, false, true},

		.supports_rgmii = {false, false, false, false, true},
@@ -186,6 +187,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x02,

		.broadcast_ctrl_reg =  0x06,

		.supports_mii = {false, false, false, false, true},

		.supports_rmii = {false, false, false, false, true},

		.supports_rgmii = {false, false, false, false, true},
@@ -205,6 +207,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x02,

		.broadcast_ctrl_reg =  0x06,

		.supports_mii = {false, false, false, false, true},

		.supports_rmii = {false, false, false, false, true},

		.supports_rgmii = {false, false, false, false, true},
@@ -223,6 +226,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x02,

		.broadcast_ctrl_reg =  0x06,

		.supports_mii = {false, false, true},

		.supports_rmii = {false, false, true},

		.internal_phy = {true, true, false},
@@ -241,6 +245,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   false, true, false},

		.supports_rmii	= {false, false, false, false,
@@ -264,6 +269,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   false, true, true},

		.supports_rmii	= {false, false, false, false,
@@ -286,6 +292,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii = {false, false, true},

		.supports_rmii = {false, false, true},

		.supports_rgmii = {false, false, true},
@@ -305,6 +312,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   false, true, true},

		.supports_rmii	= {false, false, false, false,
@@ -327,6 +335,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii = {false, false, false, false, true},

		.supports_rmii = {false, false, false, false, true},

		.supports_rgmii = {false, false, false, false, true},
@@ -345,6 +354,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii = {false, false, false, false, true, true},

		.supports_rmii = {false, false, false, false, true, true},

		.supports_rgmii = {false, false, false, false, true, true},
@@ -363,6 +373,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   true, true, false, false},

		.supports_rmii	= {false, false, false, false,
@@ -385,6 +396,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   true, true, false, false},

		.supports_rmii	= {false, false, false, false,
@@ -407,6 +419,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { 
		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),

		.reg_mib_cnt = MIB_COUNTER_NUM,

		.stp_ctrl_reg = 0x0B04,

		.broadcast_ctrl_reg =  0x0332,

		.supports_mii	= {false, false, false, false,

				   true, true, false, false},

		.supports_rmii	= {false, false, false, false,
@@ -623,6 +636,12 @@ int ksz_setup(struct dsa_switch *ds) 
		return ret;

	}



	/* set broadcast storm protection 10% rate */

	regmap_update_bits(dev->regmap[1], dev->info->broadcast_ctrl_reg,

			   BROADCAST_STORM_RATE,

			   (BROADCAST_STORM_VALUE *

			   BROADCAST_STORM_PROT_RATE) / 100);



	dev->dev_ops->config_cpu_port(ds);



	dev->dev_ops->enable_stp_addr(dev);