Commit 1ca03cbc authored by Divy Le Ray's avatar Divy Le Ray Committed by Jeff Garzik
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cxgb3 - PHY interrupts and GPIO pins. 



Remove assumption that PHY interrupts use GPIOs 3 and 5.
Deal with PHY interrupts connected to any GPIO pins.

Signed-off-by: default avatarDivy Le Ray <divy@chelsio.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 606fcd0b

drivers/net/cxgb3/t3_hw.c

+12 −6
Original line number Diff line number Diff line
@@ -1523,19 +1523,25 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx) 
 */

int t3_phy_intr_handler(struct adapter *adapter)

{

	static const int intr_gpio_bits[] = { 8, 0x20 };



	u32 mask, gpi = adapter_info(adapter)->gpio_intr;

	u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);



	for_each_port(adapter, i) {

		if (cause & intr_gpio_bits[i]) {

			struct cphy *phy = &adap2pinfo(adapter, i)->phy;

			int phy_cause = phy->ops->intr_handler(phy);

		struct port_info *p = adap2pinfo(adapter, i);



		mask = gpi - (gpi & (gpi - 1));

		gpi -= mask;



		if (!(p->port_type->caps & SUPPORTED_IRQ))

			continue;



		if (cause & mask) {

			int phy_cause = p->phy.ops->intr_handler(&p->phy);



			if (phy_cause & cphy_cause_link_change)

				t3_link_changed(adapter, i);

			if (phy_cause & cphy_cause_fifo_error)

				phy->fifo_errors++;

				p->phy.fifo_errors++;

		}

	}