Loading drivers/pci/host/pci-imx6.c +10 −10 Original line number Diff line number Diff line Loading @@ -354,7 +354,7 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp) static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp) { uint32_t tmp; u32 tmp; unsigned int retries; for (retries = 0; retries < 200; retries++) { Loading @@ -379,7 +379,7 @@ static irqreturn_t imx6_pcie_msi_handler(int irq, void *arg) static int imx6_pcie_start_link(struct pcie_port *pp) { struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); uint32_t tmp; u32 tmp; int ret; /* Loading Loading @@ -450,19 +450,19 @@ static void imx6_pcie_host_init(struct pcie_port *pp) static void imx6_pcie_reset_phy(struct pcie_port *pp) { uint32_t temp; u32 tmp; pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp); temp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN | pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &tmp); tmp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN | PHY_RX_OVRD_IN_LO_RX_PLL_EN); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, tmp); usleep_range(2000, 3000); pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp); temp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN | pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &tmp); tmp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN | PHY_RX_OVRD_IN_LO_RX_PLL_EN); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, tmp); } static int imx6_pcie_link_up(struct pcie_port *pp) Loading Loading
drivers/pci/host/pci-imx6.c +10 −10 Original line number Diff line number Diff line Loading @@ -354,7 +354,7 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp) static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp) { uint32_t tmp; u32 tmp; unsigned int retries; for (retries = 0; retries < 200; retries++) { Loading @@ -379,7 +379,7 @@ static irqreturn_t imx6_pcie_msi_handler(int irq, void *arg) static int imx6_pcie_start_link(struct pcie_port *pp) { struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); uint32_t tmp; u32 tmp; int ret; /* Loading Loading @@ -450,19 +450,19 @@ static void imx6_pcie_host_init(struct pcie_port *pp) static void imx6_pcie_reset_phy(struct pcie_port *pp) { uint32_t temp; u32 tmp; pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp); temp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN | pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &tmp); tmp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN | PHY_RX_OVRD_IN_LO_RX_PLL_EN); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, tmp); usleep_range(2000, 3000); pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp); temp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN | pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &tmp); tmp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN | PHY_RX_OVRD_IN_LO_RX_PLL_EN); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp); pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, tmp); } static int imx6_pcie_link_up(struct pcie_port *pp) Loading