Unverified Commit 1bc400ff authored by Andrew Jones's avatar Andrew Jones Committed by Palmer Dabbelt
Browse files

riscv: module: Add ADD16 and SUB16 rela types 



To prepare for 16-bit relocation types to be emitted in alternatives
add support for ADD16 and SUB16.

Signed-off-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230128172856.3814-9-jszhang@kernel.org


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent e0c267e0

arch/riscv/kernel/module.c

+16 −0
Original line number Diff line number Diff line
@@ -268,6 +268,13 @@ static int apply_r_riscv_align_rela(struct module *me, u32 *location, 
	return -EINVAL;

}



static int apply_r_riscv_add16_rela(struct module *me, u32 *location,

				    Elf_Addr v)

{

	*(u16 *)location += (u16)v;

	return 0;

}



static int apply_r_riscv_add32_rela(struct module *me, u32 *location,

				    Elf_Addr v)

{
@@ -282,6 +289,13 @@ static int apply_r_riscv_add64_rela(struct module *me, u32 *location, 
	return 0;

}



static int apply_r_riscv_sub16_rela(struct module *me, u32 *location,

				    Elf_Addr v)

{

	*(u16 *)location -= (u16)v;

	return 0;

}



static int apply_r_riscv_sub32_rela(struct module *me, u32 *location,

				    Elf_Addr v)

{
@@ -315,8 +329,10 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location, 
	[R_RISCV_CALL]			= apply_r_riscv_call_rela,

	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,

	[R_RISCV_ALIGN]			= apply_r_riscv_align_rela,

	[R_RISCV_ADD16]			= apply_r_riscv_add16_rela,

	[R_RISCV_ADD32]			= apply_r_riscv_add32_rela,

	[R_RISCV_ADD64]			= apply_r_riscv_add64_rela,

	[R_RISCV_SUB16]			= apply_r_riscv_sub16_rela,

	[R_RISCV_SUB32]			= apply_r_riscv_sub32_rela,

	[R_RISCV_SUB64]			= apply_r_riscv_sub64_rela,

};