Unverified Commit 1ba0b52e authored by Mark Brown's avatar Mark Brown
Browse files

Merge branch 'spi-5.7' into spi-next

parents 16fbf79b ebb3b9a9

Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-or-later)

%YAML 1.2

---

$id: http://devicetree.org/schemas/fsi/ibm,fsi2spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: IBM FSI-attached SPI controllers



maintainers:

 - Eddie James <eajames@linux.ibm.com>



description: |

  This binding describes an FSI CFAM engine called the FSI2SPI. Therefore this

  node will always be a child of an FSI CFAM node; see fsi.txt for details on

  FSI slave and CFAM nodes. This FSI2SPI engine provides access to a number of

  SPI controllers.



properties:

  compatible:

    enum:

      - ibm,fsi2spi



  reg:

    items:

      - description: FSI slave address



required:

  - compatible

  - reg



examples:

  - |

    fsi2spi@1c00 {

        compatible = "ibm,fsi2spi";

        reg = <0x1c00 0x400>;

    };

Documentation/devicetree/bindings/mfd/qcom-rpm.txt

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@@ -61,6 +61,7 @@ Regulator nodes are identified by their compatible: 
		    "qcom,rpm-pm8901-regulators"

		    "qcom,rpm-pm8921-regulators"

		    "qcom,rpm-pm8018-regulators"

		    "qcom,rpm-smb208-regulators"



- vdd_l0_l1_lvs-supply:

- vdd_l2_l11_l12-supply:
@@ -171,6 +172,9 @@ pm8018: 
	s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,

	l12, l14, lvs1



smb208:

	s1a, s1b, s2a, s2b



The content of each sub-node is defined by the standard binding for regulators -

see regulator.txt - with additional custom properties described below:

Documentation/devicetree/bindings/regulator/mps,mp5416.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/regulator/mps,mp5416.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Monolithic Power System MP5416 PMIC



maintainers:

  - Saravanan Sekar <sravanhome@gmail.com>



properties:

  $nodename:

    pattern: "^pmic@[0-9a-f]{1,2}$"

  compatible:

    enum:

      - mps,mp5416



  reg:

    maxItems: 1



  regulators:

    type: object

    description: |

      list of regulators provided by this controller, must be named

      after their hardware counterparts BUCK[1-4] and LDO[1-4]



    patternProperties:

      "^buck[1-4]$":

        allOf:

          - $ref: "regulator.yaml#"

        type: object



      "^ldo[1-4]$":

        allOf:

          - $ref: "regulator.yaml#"

        type: object



    additionalProperties: false

  additionalProperties: false



required:

  - compatible

  - reg

  - regulators



additionalProperties: false



examples:

  - |

    i2c {

        #address-cells = <1>;

        #size-cells = <0>;



        pmic@69 {

          compatible = "mps,mp5416";

          reg = <0x69>;



          regulators {



            buck1 {

             regulator-name = "buck1";

             regulator-min-microvolt = <600000>;

             regulator-max-microvolt = <2187500>;

             regulator-min-microamp  = <3800000>;

             regulator-max-microamp  = <6800000>;

             regulator-boot-on;

            };



            ldo2 {

             regulator-name = "ldo2";

             regulator-min-microvolt = <800000>;

             regulator-max-microvolt = <3975000>;

            };

         };

       };

     };

...

Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml

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@@ -22,6 +22,7 @@ properties: 
    enum:

      - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs

      - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs

      - amlogic,meson-g12a-spicc # SPICC controller on Amlogic G12A and compatible SoCs



  interrupts:

    maxItems: 1
@@ -40,6 +41,27 @@ properties: 
    items:

      - const: core



if:

  properties:

    compatible:

      contains:

        enum:

          - amlogic,meson-g12a-spicc



then:

  properties:

    clocks:

      contains:

        items:

          - description: controller register bus clock

          - description: baud rate generator and delay control clock



    clock-names:

      minItems: 2

      items:

        - const: core

        - const: pclk



required:

  - compatible

  - reg

Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt

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@@ -10,7 +10,10 @@ Required properties: 
  - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35

  - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51

  - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc

  - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M

  - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ

  - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM

  - "fsl,imx8mn-ecspi" for SPI compatible with the one integrated on i.MX8MN

  - "fsl,imx8mp-ecspi" for SPI compatible with the one integrated on i.MX8MP

- reg : Offset and length of the register set for the device

- interrupts : Should contain CSPI/eCSPI interrupt

- clocks : Clock specifiers for both ipg and per clocks.