Commit 1aff53b2 authored by Randy Dunlap's avatar Randy Dunlap Committed by Damien Le Moal
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ata: pata_octeon_cf: drop kernel-doc notation



Fix a slew of kernel-doc warnings in pata_octeon_cf.c by changing
all "/**" comments to "/*" since they are not in kernel-doc format.

Fixes: 3c929c6f ("libata: New driver for OCTEON SOC Compact Flash interface (v7).")
Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Reported-by: default avatarkernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/all/202302101722.5O56RClE-lkp@intel.com/


Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-ide@vger.kernel.org
Signed-off-by: default avatarDamien Le Moal <damien.lemoal@opensource.wdc.com>
parent 104ff59a
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+8 −8
Original line number Original line Diff line number Diff line
@@ -67,7 +67,7 @@ module_param(enable_dma, int, 0444);
MODULE_PARM_DESC(enable_dma,
MODULE_PARM_DESC(enable_dma,
		 "Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
		 "Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");


/**
/*
 * Convert nanosecond based time to setting used in the
 * Convert nanosecond based time to setting used in the
 * boot bus timing register, based on timing multiple
 * boot bus timing register, based on timing multiple
 */
 */
@@ -114,7 +114,7 @@ static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier)
	cvmx_write_csr(CVMX_MIO_BOOT_REG_CFGX(cs), reg_cfg.u64);
	cvmx_write_csr(CVMX_MIO_BOOT_REG_CFGX(cs), reg_cfg.u64);
}
}


/**
/*
 * Called after libata determines the needed PIO mode. This
 * Called after libata determines the needed PIO mode. This
 * function programs the Octeon bootbus regions to support the
 * function programs the Octeon bootbus regions to support the
 * timing requirements of the PIO mode.
 * timing requirements of the PIO mode.
@@ -278,7 +278,7 @@ static void octeon_cf_set_dmamode(struct ata_port *ap, struct ata_device *dev)
	cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64);
	cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64);
}
}


/**
/*
 * Handle an 8 bit I/O request.
 * Handle an 8 bit I/O request.
 *
 *
 * @qc:         Queued command
 * @qc:         Queued command
@@ -317,7 +317,7 @@ static unsigned int octeon_cf_data_xfer8(struct ata_queued_cmd *qc,
	return buflen;
	return buflen;
}
}


/**
/*
 * Handle a 16 bit I/O request.
 * Handle a 16 bit I/O request.
 *
 *
 * @qc:         Queued command
 * @qc:         Queued command
@@ -372,7 +372,7 @@ static unsigned int octeon_cf_data_xfer16(struct ata_queued_cmd *qc,
	return buflen;
	return buflen;
}
}


/**
/*
 * Read the taskfile for 16bit non-True IDE only.
 * Read the taskfile for 16bit non-True IDE only.
 */
 */
static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf)
static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf)
@@ -453,7 +453,7 @@ static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes,
	return 0;
	return 0;
}
}


/**
/*
 * Load the taskfile for 16bit non-True IDE only.  The device_addr is
 * Load the taskfile for 16bit non-True IDE only.  The device_addr is
 * not loaded, we do this as part of octeon_cf_exec_command16.
 * not loaded, we do this as part of octeon_cf_exec_command16.
 */
 */
@@ -525,7 +525,7 @@ static void octeon_cf_dma_setup(struct ata_queued_cmd *qc)
	ap->ops->sff_exec_command(ap, &qc->tf);
	ap->ops->sff_exec_command(ap, &qc->tf);
}
}


/**
/*
 * Start a DMA transfer that was already setup
 * Start a DMA transfer that was already setup
 *
 *
 * @qc:     Information about the DMA
 * @qc:     Information about the DMA
@@ -580,7 +580,7 @@ static void octeon_cf_dma_start(struct ata_queued_cmd *qc)
	cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64);
	cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64);
}
}


/**
/*
 *
 *
 *	LOCKING:
 *	LOCKING:
 *	spin_lock_irqsave(host lock)
 *	spin_lock_irqsave(host lock)