Commit 1ad4e543 authored by Robert Hoo's avatar Robert Hoo Committed by Paolo Bonzini
Browse files

KVM: VMX: Detect Tertiary VM-Execution control when setup VMCS config 



Check VMX features on tertiary execution control in VMCS config setup.
Sub-features in tertiary execution control to be enabled are adjusted
according to hardware capabilities although no sub-feature is enabled
in this patch.

EVMCSv1 doesn't support tertiary VM-execution control, so disable it
when EVMCSv1 is in use. And define the auxiliary functions for Tertiary
control field here, using the new BUILD_CONTROLS_SHADOW().

Reviewed-by: default avatarMaxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: default avatarRobert Hoo <robert.hu@linux.intel.com>
Signed-off-by: default avatarZeng Guang <guang.zeng@intel.com>
Message-Id: <20220419153400.11642-1-guang.zeng@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent ed3905ba

arch/x86/include/asm/vmx.h

+3 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#define CPU_BASED_RDTSC_EXITING                 VMCS_CONTROL_BIT(RDTSC_EXITING)

#define CPU_BASED_CR3_LOAD_EXITING		VMCS_CONTROL_BIT(CR3_LOAD_EXITING)

#define CPU_BASED_CR3_STORE_EXITING		VMCS_CONTROL_BIT(CR3_STORE_EXITING)

#define CPU_BASED_ACTIVATE_TERTIARY_CONTROLS	VMCS_CONTROL_BIT(TERTIARY_CONTROLS)

#define CPU_BASED_CR8_LOAD_EXITING              VMCS_CONTROL_BIT(CR8_LOAD_EXITING)

#define CPU_BASED_CR8_STORE_EXITING             VMCS_CONTROL_BIT(CR8_STORE_EXITING)

#define CPU_BASED_TPR_SHADOW                    VMCS_CONTROL_BIT(VIRTUAL_TPR)
@@ -221,6 +222,8 @@ enum vmcs_field { 
	ENCLS_EXITING_BITMAP_HIGH	= 0x0000202F,

	TSC_MULTIPLIER                  = 0x00002032,

	TSC_MULTIPLIER_HIGH             = 0x00002033,

	TERTIARY_VM_EXEC_CONTROL	= 0x00002034,

	TERTIARY_VM_EXEC_CONTROL_HIGH	= 0x00002035,

	GUEST_PHYSICAL_ADDRESS          = 0x00002400,

	GUEST_PHYSICAL_ADDRESS_HIGH     = 0x00002401,

	VMCS_LINK_POINTER               = 0x00002800,

arch/x86/kvm/vmx/capabilities.h

+7 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ struct vmcs_config { 
	u32 pin_based_exec_ctrl;

	u32 cpu_based_exec_ctrl;

	u32 cpu_based_2nd_exec_ctrl;

	u64 cpu_based_3rd_exec_ctrl;

	u32 vmexit_ctrl;

	u32 vmentry_ctrl;

	struct nested_vmx_msrs nested;
@@ -131,6 +132,12 @@ static inline bool cpu_has_secondary_exec_ctrls(void) 
		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;

}



static inline bool cpu_has_tertiary_exec_ctrls(void)

{

	return vmcs_config.cpu_based_exec_ctrl &

		CPU_BASED_ACTIVATE_TERTIARY_CONTROLS;

}



static inline bool cpu_has_vmx_virtualize_apic_accesses(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

arch/x86/kvm/vmx/evmcs.c

+2 −0
Original line number Diff line number Diff line
@@ -297,8 +297,10 @@ const unsigned int nr_evmcs_1_fields = ARRAY_SIZE(vmcs_field_to_evmcs_1); 
#if IS_ENABLED(CONFIG_HYPERV)

__init void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)

{

	vmcs_conf->cpu_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_EXEC_CTRL;

	vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL;

	vmcs_conf->cpu_based_2nd_exec_ctrl &= ~EVMCS1_UNSUPPORTED_2NDEXEC;

	vmcs_conf->cpu_based_3rd_exec_ctrl = 0;



	vmcs_conf->vmexit_ctrl &= ~EVMCS1_UNSUPPORTED_VMEXIT_CTRL;

	vmcs_conf->vmentry_ctrl &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL;

arch/x86/kvm/vmx/evmcs.h

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ DECLARE_STATIC_KEY_FALSE(enable_evmcs); 
 */

#define EVMCS1_UNSUPPORTED_PINCTRL (PIN_BASED_POSTED_INTR | \

				    PIN_BASED_VMX_PREEMPTION_TIMER)

#define EVMCS1_UNSUPPORTED_EXEC_CTRL (CPU_BASED_ACTIVATE_TERTIARY_CONTROLS)

#define EVMCS1_UNSUPPORTED_2NDEXEC					\

	(SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |				\

	 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |			\

arch/x86/kvm/vmx/vmcs.h

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ struct vmcs_controls_shadow { 
	u32 pin;

	u32 exec;

	u32 secondary_exec;

	u64 tertiary_exec;

};



/*