drm/i915/gem: Use to_gt() helper (1a9c4db4) · Commits · EulixOS / Software / Kernel

drivers/gpu/drm/i915/gem/i915_gem_context.c

+11 −11

Original line number	Diff line number	Diff line
		@@ -237,7 +237,7 @@ static int proto_context_set_persistence(struct drm_i915_private *i915,
		* colateral damage, and we should not pretend we can by
		* exposing the interface.
		*/
		if (!intel_has_reset_engine(&i915->gt))
		if (!intel_has_reset_engine(to_gt(i915)))
		return -ENODEV;

		pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);
		@@ -254,7 +254,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,

		if (!protected) {
		pc->uses_protected_content = false;
		} else if (!intel_pxp_is_enabled(&i915->gt.pxp)) {
		} else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
		ret = -ENODEV;
		} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) \|\|
		!(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
		@@ -268,8 +268,8 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
		*/
		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);

		if (!intel_pxp_is_active(&i915->gt.pxp))
		ret = intel_pxp_start(&i915->gt.pxp);
		if (!intel_pxp_is_active(&to_gt(i915)->pxp))
		ret = intel_pxp_start(&to_gt(i915)->pxp);
		}

		return ret;
		@@ -571,7 +571,7 @@ set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base,
		intel_engine_mask_t prev_mask;

		/* FIXME: This is NIY for execlists */
		if (!(intel_uc_uses_guc_submission(&i915->gt.uc)))
		if (!(intel_uc_uses_guc_submission(&to_gt(i915)->uc)))
		return -ENODEV;

		if (get_user(slot, &ext->engine_index))
		@@ -833,7 +833,7 @@ static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv,
		sseu = &pc->legacy_rcs_sseu;
		}

		ret = i915_gem_user_to_context_sseu(&i915->gt, &user_sseu, sseu);
		ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu);
		if (ret)
		return ret;

		@@ -1044,7 +1044,7 @@ static struct i915_gem_engines *alloc_engines(unsigned int count)
		static struct i915_gem_engines default_engines(struct i915_gem_context ctx,
		struct intel_sseu rcs_sseu)
		{
		const struct intel_gt *gt = &ctx->i915->gt;
		const struct intel_gt *gt = to_gt(ctx->i915);
		struct intel_engine_cs *engine;
		struct i915_gem_engines e, err;
		enum intel_engine_id id;
		@@ -1521,7 +1521,7 @@ static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
		* colateral damage, and we should not pretend we can by
		* exposing the interface.
		*/
		if (!intel_has_reset_engine(&ctx->i915->gt))
		if (!intel_has_reset_engine(to_gt(ctx->i915)))
		return -ENODEV;

		i915_gem_context_clear_persistence(ctx);
		@@ -1559,7 +1559,7 @@ i915_gem_create_context(struct drm_i915_private *i915,
		} else if (HAS_FULL_PPGTT(i915)) {
		struct i915_ppgtt *ppgtt;

		ppgtt = i915_ppgtt_create(&i915->gt, 0);
		ppgtt = i915_ppgtt_create(to_gt(i915), 0);
		if (IS_ERR(ppgtt)) {
		drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n",
		PTR_ERR(ppgtt));
		@@ -1742,7 +1742,7 @@ int i915_gem_vm_create_ioctl(struct drm_device dev, void data,
		if (args->flags)
		return -EINVAL;

		ppgtt = i915_ppgtt_create(&i915->gt, 0);
		ppgtt = i915_ppgtt_create(to_gt(i915), 0);
		if (IS_ERR(ppgtt))
		return PTR_ERR(ppgtt);

		@@ -2194,7 +2194,7 @@ int i915_gem_context_create_ioctl(struct drm_device dev, void data,
		if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
		return -EINVAL;

		ret = intel_gt_terminally_wedged(&i915->gt);
		ret = intel_gt_terminally_wedged(to_gt(i915));
		if (ret)
		return ret;

drivers/gpu/drm/i915/gem/i915_gem_create.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -379,7 +379,7 @@ static int ext_set_protected(struct i915_user_extension __user base, void data
		if (ext.flags)
		return -EINVAL;

		if (!intel_pxp_is_enabled(&ext_data->i915->gt.pxp))
		if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp))
		return -ENODEV;

		ext_data->flags \|= I915_BO_PROTECTED;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -2361,9 +2361,9 @@ static int eb_submit(struct i915_execbuffer *eb)
		return err;
		}

		static int num_vcs_engines(const struct drm_i915_private *i915)
		static int num_vcs_engines(struct drm_i915_private *i915)
		{
		return hweight_long(VDBOX_MASK(&i915->gt));
		return hweight_long(VDBOX_MASK(to_gt(i915)));
		}

		/*

drivers/gpu/drm/i915/gem/i915_gem_mman.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -645,7 +645,7 @@ mmap_offset_attach(struct drm_i915_gem_object *obj,
		goto insert;

		/* Attempt to reap some mmap space from dead objects */
		err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT,
		err = intel_gt_retire_requests_timeout(to_gt(i915), MAX_SCHEDULE_TIMEOUT,
		NULL);
		if (err)
		goto err;

drivers/gpu/drm/i915/gem/i915_gem_phys.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@
		static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj)
		{
		struct address_space *mapping = obj->base.filp->f_mapping;
		struct drm_i915_private *i915 = to_i915(obj->base.dev);
		struct scatterlist *sg;
		struct sg_table *st;
		dma_addr_t dma;
		@@ -73,7 +74,7 @@ static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj)
		dst += PAGE_SIZE;
		}

		intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
		intel_gt_chipset_flush(to_gt(i915));

		/* We're no longer struct page backed */
		obj->mem_flags &= ~I915_BO_FLAG_STRUCT_PAGE;
		@@ -140,6 +141,7 @@ int i915_gem_object_pwrite_phys(struct drm_i915_gem_object *obj,
		{
		void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset;
		char __user *user_data = u64_to_user_ptr(args->data_ptr);
		struct drm_i915_private *i915 = to_i915(obj->base.dev);
		int err;

		err = i915_gem_object_wait(obj,
		@@ -159,7 +161,7 @@ int i915_gem_object_pwrite_phys(struct drm_i915_gem_object *obj,
		return -EFAULT;

		drm_clflush_virt_range(vaddr, args->size);
		intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
		intel_gt_chipset_flush(to_gt(i915));

		i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
		return 0;