Commit 1a7ff828 authored May 14, 2021 by Jiaran Zhang Committed by David S. Miller May 14, 2021

net: hns3: refactor dump reset info of debugfs



Currently, the debugfs command for reset info is implemented by
"echo xxxx > cmd", and record the information in dmesg. It's
unnecessary and heavy. To improve it, create a single file
"reset_info" for it, and query it by command "cat reset_info",
return the result to userspace, rather than record in dmesg.

The display style is below:
$cat reset_info
PF reset count: 0
FLR reset count: 0
GLOBAL reset count: 0
IMP reset count: 0
reset done count: 0
HW reset done count: 0
reset count: 0
reset fail count: 0
vector0 interrupt enable status: 0x1
reset interrupt source: 0x0
reset interrupt status: 0x0
RAS interrupt status:0x0
hardware reset status: 0x0
handshake status: 0x80
function reset status: 0x0

Change to the "hclge_show_rst_info" in the "hclge_reset_err_handle",
when the reset fails, display reset info immediately.

Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent 9149ca0f

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -262,6 +262,7 @@ enum hnae3_dbg_cmd {
		HNAE3_DBG_CMD_MNG_TBL,
		HNAE3_DBG_CMD_LOOPBACK,
		HNAE3_DBG_CMD_INTERRUPT_INFO,
		HNAE3_DBG_CMD_RESET_INFO,
		HNAE3_DBG_CMD_UNKNOWN,
		};

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

+7 −1

Original line number	Diff line number	Diff line
		@@ -111,6 +111,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
		},
		{
		.name = "reset_info",
		.cmd = HNAE3_DBG_CMD_RESET_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
		},
		};

		static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
		@@ -505,7 +512,6 @@ static void hns3_dbg_help(struct hnae3_handle *h)
		dev_info(&h->pdev->dev, "dump qos pause cfg\n");
		dev_info(&h->pdev->dev, "dump qos pri map\n");
		dev_info(&h->pdev->dev, "dump qos buf cfg\n");
		dev_info(&h->pdev->dev, "dump reset info\n");
		dev_info(&h->pdev->dev, "dump m7 info\n");
		dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
		dev_info(&h->pdev->dev, "dump mac tnl status\n");

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

+44 −32

Original line number	Diff line number	Diff line
		@@ -4,6 +4,7 @@
		#include <linux/device.h>

		#include "hclge_debugfs.h"
		#include "hclge_err.h"
		#include "hclge_main.h"
		#include "hclge_tm.h"
		#include "hnae3.h"
		@@ -1389,37 +1390,46 @@ static void hclge_dbg_fd_tcam(struct hclge_dev *hdev)
		kfree(rule_locs);
		}

		void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
		int hclge_dbg_dump_rst_info(struct hclge_dev hdev, char buf, int len)
		{
		dev_info(&hdev->pdev->dev, "PF reset count: %u\n",
		int pos = 0;

		pos += scnprintf(buf + pos, len - pos, "PF reset count: %u\n",
		hdev->rst_stats.pf_rst_cnt);
		dev_info(&hdev->pdev->dev, "FLR reset count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "FLR reset count: %u\n",
		hdev->rst_stats.flr_rst_cnt);
		dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "GLOBAL reset count: %u\n",
		hdev->rst_stats.global_rst_cnt);
		dev_info(&hdev->pdev->dev, "IMP reset count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "IMP reset count: %u\n",
		hdev->rst_stats.imp_rst_cnt);
		dev_info(&hdev->pdev->dev, "reset done count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "reset done count: %u\n",
		hdev->rst_stats.reset_done_cnt);
		dev_info(&hdev->pdev->dev, "HW reset done count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "HW reset done count: %u\n",
		hdev->rst_stats.hw_reset_done_cnt);
		dev_info(&hdev->pdev->dev, "reset count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "reset count: %u\n",
		hdev->rst_stats.reset_cnt);
		dev_info(&hdev->pdev->dev, "reset fail count: %u\n",
		pos += scnprintf(buf + pos, len - pos, "reset fail count: %u\n",
		hdev->rst_stats.reset_fail_cnt);
		dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos,
		"vector0 interrupt enable status: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE));
		dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos, "reset interrupt source: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG));
		dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos, "reset interrupt status: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS));
		dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos, "RAS interrupt status: 0x%x\n",
		hclge_read_dev(&hdev->hw,
		HCLGE_RAS_PF_OTHER_INT_STS_REG));
		pos += scnprintf(buf + pos, len - pos, "hardware reset status: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG));
		dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos, "handshake status: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG));
		dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n",
		pos += scnprintf(buf + pos, len - pos, "function reset status: 0x%x\n",
		hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING));
		dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state);
		pos += scnprintf(buf + pos, len - pos, "hdev state: 0x%lx\n",
		hdev->state);

		return 0;
		}

		static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev)
		@@ -1819,8 +1829,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle handle, const char cmd_buf)
		hclge_dbg_dump_qos_buf_cfg(hdev);
		} else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) {
		hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]);
		} else if (strncmp(cmd_buf, "dump reset info", 15) == 0) {
		hclge_dbg_dump_rst_info(hdev);
		} else if (strncmp(cmd_buf, "dump serv info", 14) == 0) {
		hclge_dbg_dump_serv_info(hdev);
		} else if (strncmp(cmd_buf, "dump m7 info", 12) == 0) {
		@@ -1874,6 +1882,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {
		.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,
		.dbg_dump = hclge_dbg_dump_interrupt,
		},
		{
		.cmd = HNAE3_DBG_CMD_RESET_INFO,
		.dbg_dump = hclge_dbg_dump_rst_info,
		},
		};

		int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+16 −1

Original line number	Diff line number	Diff line
		@@ -3936,6 +3936,21 @@ static int hclge_reset_prepare_wait(struct hclge_dev *hdev)
		return ret;
		}

		static void hclge_show_rst_info(struct hclge_dev *hdev)
		{
		char *buf;

		buf = kzalloc(HCLGE_DBG_RESET_INFO_LEN, GFP_KERNEL);
		if (!buf)
		return;

		hclge_dbg_dump_rst_info(hdev, buf, HCLGE_DBG_RESET_INFO_LEN);

		dev_info(&hdev->pdev->dev, "dump reset info:\n%s", buf);

		kfree(buf);
		}

		static bool hclge_reset_err_handle(struct hclge_dev *hdev)
		{
		#define MAX_RESET_FAIL_CNT 5
		@@ -3966,7 +3981,7 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)

		dev_err(&hdev->pdev->dev, "Reset fail!\n");

		hclge_dbg_dump_rst_info(hdev);
		hclge_show_rst_info(hdev);

		set_bit(HCLGE_STATE_RST_FAIL, &hdev->state);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

+3 −1

Original line number	Diff line number	Diff line
		@@ -148,6 +148,8 @@

		#define HCLGE_MAX_QSET_NUM 1024

		#define HCLGE_DBG_RESET_INFO_LEN 1024

		enum HLCGE_PORT_TYPE {
		HOST_PORT,
		NETWORK_PORT
		@@ -1089,6 +1091,6 @@ int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev,
		void hclge_report_hw_error(struct hclge_dev *hdev,
		enum hnae3_hw_error_type type);
		void hclge_inform_vf_promisc_info(struct hclge_vport *vport);
		void hclge_dbg_dump_rst_info(struct hclge_dev *hdev);
		int hclge_dbg_dump_rst_info(struct hclge_dev hdev, char buf, int len);
		int hclge_push_vf_link_status(struct hclge_vport *vport);
		#endif