Commit 1a5d8ff0 authored by Alexandru M Stan's avatar Alexandru M Stan Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7180-trogdor: Remove fp control pins in prep for coachz 



Removed the pinctrl and pin{mux,conf} for the control pins because:
1. The only need for them is for userspace control via flash_fp_mcu
2. cros-ec doesn't know what to do with them, and even if it did,
   it would interfere with flash_fp_mcu at the most inopportune times

Since we're not using hogs, we rely on AP firmware to set all the
control pins correctly.

Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Craig Hesling <hesling@chromium.org>
Signed-off-by: default avatarAlexandru M Stan <amstan@chromium.org>
[dianders: adjusted since coachz isn't upstream yet]
Reviewed-by; Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.7.Ifd7b86f826b18410eada75758a7bca1eebfa336d@changeid


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent fcd66fe6

arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi

+1 −44
Original line number Diff line number Diff line
@@ -810,7 +810,7 @@ ap_spi_fp: &spi10 { 
		interrupt-parent = <&tlmm>;

		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>, <&fpmcu_sel>;

		pinctrl-0 = <&fp_to_ap_irq_l>;

		spi-max-frequency = <3000000>;

	};

};
@@ -1235,48 +1235,6 @@ ap_spi_fp: &spi10 { 
		};

	};



	fpmcu_boot0: fpmcu-boot0 {

		pinmux {

			pins = "gpio10";

			function = "gpio";

		};



		pinconf {

			pins = "gpio10";

			bias-disable;

			drive-strength = <2>;

			output-low;

		};

	};



	fpmcu_sel: fpmcu-sel {

		pinmux {

			pins = "gpio22";

			function = "gpio";

		};



		pinconf {

			pins = "gpio22";

			bias-disable;

			drive-strength = <2>;

			output-high;

		};

	};



	fp_rst_l: fp-rst-l {

		pinmux {

			pins = "gpio5";

			function = "gpio";

		};



		pinconf {

			pins = "gpio5";

			bias-disable;

			drive-strength = <2>;

			output-high;

		};

	};



	fp_to_ap_irq_l: fp-to-ap-irq-l {

		pinmux {

			pins = "gpio4";
@@ -1292,7 +1250,6 @@ ap_spi_fp: &spi10 { 
		};

	};





	h1_ap_int_odl: h1-ap-int-odl {

		pinmux {

			pins = "gpio42";