Commit 1a46098e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nvc0/ttm: use copy engines for async buffer moves 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent fdf53241

drivers/gpu/drm/nouveau/nouveau_bo.c

+51 −9
Original line number Diff line number Diff line
@@ -522,6 +522,44 @@ nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle) 
	return ret;

}



static int

nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,

		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)

{

	struct nouveau_mem *node = old_mem->mm_node;

	u64 src_offset = node->vma[0].offset;

	u64 dst_offset = node->vma[1].offset;

	u32 page_count = new_mem->num_pages;

	int ret;



	page_count = new_mem->num_pages;

	while (page_count) {

		int line_count = (page_count > 8191) ? 8191 : page_count;



		ret = RING_SPACE(chan, 11);

		if (ret)

			return ret;



		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8);

		OUT_RING  (chan, upper_32_bits(src_offset));

		OUT_RING  (chan, lower_32_bits(src_offset));

		OUT_RING  (chan, upper_32_bits(dst_offset));

		OUT_RING  (chan, lower_32_bits(dst_offset));

		OUT_RING  (chan, PAGE_SIZE);

		OUT_RING  (chan, PAGE_SIZE);

		OUT_RING  (chan, PAGE_SIZE);

		OUT_RING  (chan, line_count);

		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);

		OUT_RING  (chan, 0x00000110);



		page_count -= line_count;

		src_offset += (PAGE_SIZE * line_count);

		dst_offset += (PAGE_SIZE * line_count);

	}



	return 0;

}



static int

nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,

		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
@@ -887,28 +925,32 @@ nouveau_bo_move_init(struct nouveau_channel *chan) 
	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;

	static const struct {

		const char *name;

		int engine;

		u32 oclass;

		int (*exec)(struct nouveau_channel *,

			    struct ttm_buffer_object *,

			    struct ttm_mem_reg *, struct ttm_mem_reg *);

		int (*init)(struct nouveau_channel *, u32 handle);

	} _methods[] = {

		{  "COPY", 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },

		{  "COPY", 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },

		{ "CRYPT", 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },

		{  "M2MF", 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },

		{  "M2MF", 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },

		{  "M2MF", 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },

		{  "COPY", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },

		{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },

		{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },

		{  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },

		{ "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },

		{  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },

		{  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },

		{  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },

		{},

		{ "CRYPT", 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },

		{ "CRYPT", 0, 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },

	}, *mthd = _methods;

	const char *name = "CPU";

	int ret;



	do {

		ret = nouveau_gpuobj_gr_new(chan, mthd->oclass, mthd->oclass);

		u32 handle = (mthd->engine << 16) | mthd->oclass;

		ret = nouveau_gpuobj_gr_new(chan, handle, mthd->oclass);

		if (ret == 0) {

			ret = mthd->init(chan, mthd->oclass);

			ret = mthd->init(chan, handle);

			if (ret == 0) {

				dev_priv->ttm.move = mthd->exec;

				name = mthd->name;