Loading arch/arm/vfp/vfp.h +2 −0 Original line number Diff line number Diff line Loading @@ -361,10 +361,12 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); * OP_SCALAR - this operation always operates in scalar mode * OP_SD - the instruction exceptionally writes to a single precision result. * OP_DD - the instruction exceptionally writes to a double precision result. * OP_SM - the instruction exceptionally reads from a single precision operand. */ #define OP_SCALAR (1 << 0) #define OP_SD (1 << 1) #define OP_DD (1 << 1) #define OP_SM (1 << 2) struct op { u32 (* const fn)(int dd, int dn, int dm, u32 fpscr); Loading arch/arm/vfp/vfpdouble.c +11 −3 Original line number Diff line number Diff line Loading @@ -668,8 +668,8 @@ static struct op fops_ext[32] = { [FEXT_TO_IDX(FEXT_FCMPZ)] = { vfp_double_fcmpz, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FCMPEZ)] = { vfp_double_fcmpez, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FCVT)] = { vfp_double_fcvts, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_double_fuito, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_double_fsito, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_double_fuito, OP_SCALAR|OP_SM }, [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_double_fsito, OP_SCALAR|OP_SM }, [FEXT_TO_IDX(FEXT_FTOUI)] = { vfp_double_ftoui, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FTOUIZ)] = { vfp_double_ftouiz, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FTOSI)] = { vfp_double_ftosi, OP_SCALAR|OP_SD }, Loading Loading @@ -1128,7 +1128,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) u32 exceptions = 0; unsigned int dest; unsigned int dn = vfp_get_dn(inst); unsigned int dm = vfp_get_dm(inst); unsigned int dm; unsigned int vecitr, veclen, vecstride; struct op *fop; Loading @@ -1145,6 +1145,14 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) else dest = vfp_get_dd(inst); /* * f[us]ito takes a sN operand, not a dN operand. */ if (fop->flags & OP_SM) dm = vfp_get_sm(inst); else dm = vfp_get_dm(inst); /* * If destination bank is zero, vector length is always '1'. * ARM DDI0100F C5.1.3, C5.3.2. Loading include/asm-arm/arch-pxa/hardware.h +8 −16 Original line number Diff line number Diff line Loading @@ -121,38 +121,32 @@ #define cpu_is_pxa21x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa21x(id); \ __cpu_is_pxa21x(read_cpuid_id()); \ }) #define cpu_is_pxa25x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa25x(id); \ __cpu_is_pxa25x(read_cpuid_id()); \ }) #define cpu_is_pxa27x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa27x(id); \ __cpu_is_pxa27x(read_cpuid_id()); \ }) #define cpu_is_pxa300() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa300(id); \ __cpu_is_pxa300(read_cpuid_id()); \ }) #define cpu_is_pxa310() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa310(id); \ __cpu_is_pxa310(read_cpuid_id()); \ }) #define cpu_is_pxa320() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa320(id); \ __cpu_is_pxa320(read_cpuid_id()); \ }) /* Loading @@ -174,14 +168,12 @@ #define cpu_is_pxa2xx() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa2xx(id); \ __cpu_is_pxa2xx(read_cpuid_id()); \ }) #define cpu_is_pxa3xx() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa3xx(id); \ __cpu_is_pxa3xx(read_cpuid_id()); \ }) /* Loading include/asm-arm/system.h +13 −0 Original line number Diff line number Diff line Loading @@ -75,8 +75,21 @@ #ifndef __ASSEMBLY__ #include <linux/linkage.h> #include <linux/stringify.h> #include <linux/irqflags.h> /* * The CPU ID never changes at run time, so we might as well tell the * compiler that it's constant. Use this function to read the CPU ID * rather than directly reading processor_id or read_cpuid() directly. */ static inline unsigned int read_cpuid_id(void) __attribute_const__; static inline unsigned int read_cpuid_id(void) { return read_cpuid(CPUID_ID); } #define __exception __attribute__((section(".exception.text"))) struct thread_info; Loading Loading
arch/arm/vfp/vfp.h +2 −0 Original line number Diff line number Diff line Loading @@ -361,10 +361,12 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); * OP_SCALAR - this operation always operates in scalar mode * OP_SD - the instruction exceptionally writes to a single precision result. * OP_DD - the instruction exceptionally writes to a double precision result. * OP_SM - the instruction exceptionally reads from a single precision operand. */ #define OP_SCALAR (1 << 0) #define OP_SD (1 << 1) #define OP_DD (1 << 1) #define OP_SM (1 << 2) struct op { u32 (* const fn)(int dd, int dn, int dm, u32 fpscr); Loading
arch/arm/vfp/vfpdouble.c +11 −3 Original line number Diff line number Diff line Loading @@ -668,8 +668,8 @@ static struct op fops_ext[32] = { [FEXT_TO_IDX(FEXT_FCMPZ)] = { vfp_double_fcmpz, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FCMPEZ)] = { vfp_double_fcmpez, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FCVT)] = { vfp_double_fcvts, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_double_fuito, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_double_fsito, OP_SCALAR }, [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_double_fuito, OP_SCALAR|OP_SM }, [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_double_fsito, OP_SCALAR|OP_SM }, [FEXT_TO_IDX(FEXT_FTOUI)] = { vfp_double_ftoui, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FTOUIZ)] = { vfp_double_ftouiz, OP_SCALAR|OP_SD }, [FEXT_TO_IDX(FEXT_FTOSI)] = { vfp_double_ftosi, OP_SCALAR|OP_SD }, Loading Loading @@ -1128,7 +1128,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) u32 exceptions = 0; unsigned int dest; unsigned int dn = vfp_get_dn(inst); unsigned int dm = vfp_get_dm(inst); unsigned int dm; unsigned int vecitr, veclen, vecstride; struct op *fop; Loading @@ -1145,6 +1145,14 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) else dest = vfp_get_dd(inst); /* * f[us]ito takes a sN operand, not a dN operand. */ if (fop->flags & OP_SM) dm = vfp_get_sm(inst); else dm = vfp_get_dm(inst); /* * If destination bank is zero, vector length is always '1'. * ARM DDI0100F C5.1.3, C5.3.2. Loading
include/asm-arm/arch-pxa/hardware.h +8 −16 Original line number Diff line number Diff line Loading @@ -121,38 +121,32 @@ #define cpu_is_pxa21x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa21x(id); \ __cpu_is_pxa21x(read_cpuid_id()); \ }) #define cpu_is_pxa25x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa25x(id); \ __cpu_is_pxa25x(read_cpuid_id()); \ }) #define cpu_is_pxa27x() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa27x(id); \ __cpu_is_pxa27x(read_cpuid_id()); \ }) #define cpu_is_pxa300() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa300(id); \ __cpu_is_pxa300(read_cpuid_id()); \ }) #define cpu_is_pxa310() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa310(id); \ __cpu_is_pxa310(read_cpuid_id()); \ }) #define cpu_is_pxa320() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa320(id); \ __cpu_is_pxa320(read_cpuid_id()); \ }) /* Loading @@ -174,14 +168,12 @@ #define cpu_is_pxa2xx() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa2xx(id); \ __cpu_is_pxa2xx(read_cpuid_id()); \ }) #define cpu_is_pxa3xx() \ ({ \ unsigned int id = read_cpuid(CPUID_ID); \ __cpu_is_pxa3xx(id); \ __cpu_is_pxa3xx(read_cpuid_id()); \ }) /* Loading
include/asm-arm/system.h +13 −0 Original line number Diff line number Diff line Loading @@ -75,8 +75,21 @@ #ifndef __ASSEMBLY__ #include <linux/linkage.h> #include <linux/stringify.h> #include <linux/irqflags.h> /* * The CPU ID never changes at run time, so we might as well tell the * compiler that it's constant. Use this function to read the CPU ID * rather than directly reading processor_id or read_cpuid() directly. */ static inline unsigned int read_cpuid_id(void) __attribute_const__; static inline unsigned int read_cpuid_id(void) { return read_cpuid(CPUID_ID); } #define __exception __attribute__((section(".exception.text"))) struct thread_info; Loading