Commit 19ecbc84 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
Browse files

arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains 



Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.

Tested-by: default avatarRob Clark <robdclark@gmail.com>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1594292674-15632-4-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 4dc8ff06

arch/arm64/boot/dts/qcom/sdm845.dtsi

+59 −0
Original line number Diff line number Diff line
@@ -3721,6 +3721,35 @@ 
			#power-domain-cells = <1>;

		};



		dsi_opp_table: dsi-opp-table {

			compatible = "operating-points-v2";



			opp-19200000 {

				opp-hz = /bits/ 64 <19200000>;

				required-opps = <&rpmhpd_opp_min_svs>;

			};



			opp-180000000 {

				opp-hz = /bits/ 64 <180000000>;

				required-opps = <&rpmhpd_opp_low_svs>;

			};



			opp-275000000 {

				opp-hz = /bits/ 64 <275000000>;

				required-opps = <&rpmhpd_opp_svs>;

			};



			opp-328580000 {

				opp-hz = /bits/ 64 <328580000>;

				required-opps = <&rpmhpd_opp_svs_l1>;

			};



			opp-358000000 {

				opp-hz = /bits/ 64 <358000000>;

				required-opps = <&rpmhpd_opp_nom>;

			};

		};



		mdss: mdss@ae00000 {

			compatible = "qcom,sdm845-mdss";

			reg = <0 0x0ae00000 0 0x1000>;
@@ -3765,6 +3794,8 @@ 
						  <&dispcc DISP_CC_MDSS_VSYNC_CLK>;

				assigned-clock-rates = <300000000>,

						       <19200000>;

				operating-points-v2 = <&mdp_opp_table>;

				power-domains = <&rpmhpd SDM845_CX>;



				interrupt-parent = <&mdss>;

				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
@@ -3789,6 +3820,30 @@ 
						};

					};

				};



				mdp_opp_table: mdp-opp-table {

					compatible = "operating-points-v2";



					opp-19200000 {

						opp-hz = /bits/ 64 <19200000>;

						required-opps = <&rpmhpd_opp_min_svs>;

					};



					opp-171428571 {

						opp-hz = /bits/ 64 <171428571>;

						required-opps = <&rpmhpd_opp_low_svs>;

					};



					opp-344000000 {

						opp-hz = /bits/ 64 <344000000>;

						required-opps = <&rpmhpd_opp_svs_l1>;

					};



					opp-430000000 {

						opp-hz = /bits/ 64 <430000000>;

						required-opps = <&rpmhpd_opp_nom>;

					};

				};

			};



			dsi0: dsi@ae94000 {
@@ -3811,6 +3866,8 @@ 
					      "core",

					      "iface",

					      "bus";

				operating-points-v2 = <&dsi_opp_table>;

				power-domains = <&rpmhpd SDM845_CX>;



				phys = <&dsi0_phy>;

				phy-names = "dsi";
@@ -3875,6 +3932,8 @@ 
					      "core",

					      "iface",

					      "bus";

				operating-points-v2 = <&dsi_opp_table>;

				power-domains = <&rpmhpd SDM845_CX>;



				phys = <&dsi1_phy>;

				phy-names = "dsi";