Commit 19b5a44b authored by Huqiang Qin's avatar Huqiang Qin Committed by Marc Zyngier
Browse files

irqchip: Add support for Amlogic-C3 SoCs 



The Amlogic-C3 SoCs support 12 GPIO IRQ lines compared with previous
serial chips and have something different, details are as below.

IRQ Number:
- 54     1 pins on bank TESTN
- 53:40 14 pins on bank X
- 39:33  7 pins on bank D
- 32:27  6 pins on bank A
- 26:22  5 pins on bank E
- 21:15  7 pins on bank C
- 14:0  15 pins on bank B

Signed-off-by: default avatarHuqiang Qin <huqiang.qin@amlogic.com>
Acked-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230628091533.3884385-3-huqiang.qin@amlogic.com
parent 2b709c67

drivers/irqchip/irq-meson-gpio.c

+5 −0
Original line number Diff line number Diff line
@@ -150,6 +150,10 @@ static const struct meson_gpio_irq_params s4_params = { 
	INIT_MESON_S4_COMMON_DATA(82)

};



static const struct meson_gpio_irq_params c3_params = {

	INIT_MESON_S4_COMMON_DATA(55)

};



static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = {

	{ .compatible = "amlogic,meson8-gpio-intc", .data = &meson8_params },

	{ .compatible = "amlogic,meson8b-gpio-intc", .data = &meson8b_params },
@@ -160,6 +164,7 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = { 
	{ .compatible = "amlogic,meson-sm1-gpio-intc", .data = &sm1_params },

	{ .compatible = "amlogic,meson-a1-gpio-intc", .data = &a1_params },

	{ .compatible = "amlogic,meson-s4-gpio-intc", .data = &s4_params },

	{ .compatible = "amlogic,c3-gpio-intc", .data = &c3_params },

	{ }

};