Commit 19aa21b9 authored by Ofir Bitton's avatar Ofir Bitton Committed by Oded Gabbay
Browse files

accel/habanalabs: unsecure TSB_CFG_MTRR regs



In order to utilize Engine Barrier padding, user must have access to
this register set.

Signed-off-by: default avatarOfir Bitton <obitton@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent ff5c7025
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -1534,6 +1534,10 @@ static const u32 gaudi2_pb_dcr0_tpc0_unsecured_regs[] = {
	mmDCORE0_TPC0_CFG_QM_KERNEL_CONFIG,
	mmDCORE0_TPC0_CFG_QM_KERNEL_ID,
	mmDCORE0_TPC0_CFG_QM_POWER_LOOP,
	mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_0,
	mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_1,
	mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_2,
	mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_3,
	mmDCORE0_TPC0_CFG_LUT_FUNC32_BASE2_ADDR_LO,
	mmDCORE0_TPC0_CFG_LUT_FUNC32_BASE2_ADDR_HI,
	mmDCORE0_TPC0_CFG_LUT_FUNC64_BASE2_ADDR_LO,