Commit 19221e30 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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soc/tegra: pmc: Fix imbalanced clock disabling in error code path 



The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ef85bb58

drivers/soc/tegra/pmc.c

+1 −1
Original line number Diff line number Diff line
@@ -660,7 +660,7 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg, 


	err = tegra_powergate_enable_clocks(pg);

	if (err)

		goto disable_clks;

		goto powergate_off;



	usleep_range(10, 20);