Commit 18b20ac0 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark
Browse files

drm/msm/dpu: drop remains of old irq lookup subsystem 



There is no more need for the dpu_intr_type types, dpu_irq_map table,
individual intr defines and obsolete_irq field. Drop all of them now.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210516202910.2141079-6-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 667e9985

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

+0 −2
Original line number Diff line number Diff line
@@ -165,7 +165,6 @@ enum dpu_intr_idx { 
/**

 * dpu_encoder_irq - tracking structure for interrupts

 * @name:		string name of interrupt

 * @intr_type:		Encoder interrupt type

 * @intr_idx:		Encoder interrupt enumeration

 * @irq_idx:		IRQ interface lookup index from DPU IRQ framework

 *			will be -EINVAL if IRQ is not registered
@@ -173,7 +172,6 @@ enum dpu_intr_idx { 
 */

struct dpu_encoder_irq {

	const char *name;

	enum dpu_intr_type intr_type;

	enum dpu_intr_idx intr_idx;

	int irq_idx;

	struct dpu_irq_callback cb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+0 −4
Original line number Diff line number Diff line
@@ -793,25 +793,21 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( 


	irq = &phys_enc->irq[INTR_IDX_CTL_START];

	irq->name = "ctl_start";

	irq->intr_type = DPU_IRQ_TYPE_CTL_START;

	irq->intr_idx = INTR_IDX_CTL_START;

	irq->cb.func = dpu_encoder_phys_cmd_ctl_start_irq;



	irq = &phys_enc->irq[INTR_IDX_PINGPONG];

	irq->name = "pp_done";

	irq->intr_type = DPU_IRQ_TYPE_PING_PONG_COMP;

	irq->intr_idx = INTR_IDX_PINGPONG;

	irq->cb.func = dpu_encoder_phys_cmd_pp_tx_done_irq;



	irq = &phys_enc->irq[INTR_IDX_RDPTR];

	irq->name = "pp_rd_ptr";

	irq->intr_type = DPU_IRQ_TYPE_PING_PONG_RD_PTR;

	irq->intr_idx = INTR_IDX_RDPTR;

	irq->cb.func = dpu_encoder_phys_cmd_pp_rd_ptr_irq;



	irq = &phys_enc->irq[INTR_IDX_UNDERRUN];

	irq->name = "underrun";

	irq->intr_type = DPU_IRQ_TYPE_INTF_UNDER_RUN;

	irq->intr_idx = INTR_IDX_UNDERRUN;

	irq->cb.func = dpu_encoder_phys_cmd_underrun_irq;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+0 −2
Original line number Diff line number Diff line
@@ -735,13 +735,11 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( 


	irq = &phys_enc->irq[INTR_IDX_VSYNC];

	irq->name = "vsync_irq";

	irq->intr_type = DPU_IRQ_TYPE_INTF_VSYNC;

	irq->intr_idx = INTR_IDX_VSYNC;

	irq->cb.func = dpu_encoder_phys_vid_vblank_irq;



	irq = &phys_enc->irq[INTR_IDX_UNDERRUN];

	irq->name = "underrun";

	irq->intr_type = DPU_IRQ_TYPE_INTF_UNDER_RUN;

	irq->intr_idx = INTR_IDX_UNDERRUN;

	irq->cb.func = dpu_encoder_phys_vid_underrun_irq;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+0 −9
Original line number Diff line number Diff line
@@ -74,13 +74,6 @@ 
			 BIT(MDP_INTF0_INTR) | \

			 BIT(MDP_INTF1_INTR))



#define INTR_SC7180_MASK \

	(BIT(DPU_IRQ_TYPE_PING_PONG_RD_PTR) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_WR_PTR) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_AUTO_REF) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_TE_CHECK))



#define IRQ_SC7280_MASK (BIT(MDP_SSPP_TOP0_INTR) | \

			 BIT(MDP_SSPP_TOP0_INTR2) | \

			 BIT(MDP_SSPP_TOP0_HIST_INTR) | \
@@ -1171,7 +1164,6 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.dma_cfg = sdm845_regdma,

		.perf = sc7180_perf_data,

		.mdss_irqs = IRQ_SC7180_MASK,

		.obsolete_irq = INTR_SC7180_MASK,

	};

}
@@ -1261,7 +1253,6 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.vbif = sdm845_vbif,

		.perf = sc7280_perf_data,

		.mdss_irqs = IRQ_SC7280_MASK,

		.obsolete_irq = INTR_SC7180_MASK,

	};

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+0 −2
Original line number Diff line number Diff line
@@ -733,7 +733,6 @@ struct dpu_perf_cfg { 
 * @cursor_formats     Supported formats for cursor pipe

 * @vig_formats        Supported formats for vig pipe

 * @mdss_irqs:         Bitmap with the irqs supported by the target

 * @obsolete_irq:       Irq types that are obsolete for a particular target

 */

struct dpu_mdss_cfg {

	u32 hwversion;
@@ -780,7 +779,6 @@ struct dpu_mdss_cfg { 
	const struct dpu_format_extended *vig_formats;



	unsigned long mdss_irqs;

	unsigned long obsolete_irq;

};



struct dpu_mdss_hw_cfg_handler {