Loading Documentation/virt/kvm/arm/pvtime.rst +2 −2 Original line number Diff line number Diff line Loading @@ -19,8 +19,8 @@ Two new SMCCC compatible hypercalls are defined: These are only available in the SMC64/HVC64 calling convention as paravirtualized time is not available to 32 bit Arm guests. The existence of the PV_FEATURES hypercall should be probed using the SMCCC 1.1 ARCH_FEATURES mechanism before calling it. the PV_TIME_FEATURES hypercall should be probed using the SMCCC 1.1 ARCH_FEATURES mechanism before calling it. PV_TIME_FEATURES ============= ======== ========== Loading arch/arm64/kvm/pvtime.c +1 −5 Original line number Diff line number Diff line Loading @@ -53,7 +53,6 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu) struct pvclock_vcpu_stolen_time init_values = {}; struct kvm *kvm = vcpu->kvm; u64 base = vcpu->arch.steal.base; int idx; if (base == GPA_INVALID) return base; Loading @@ -63,10 +62,7 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu) * the feature enabled. */ vcpu->arch.steal.last_steal = current->sched_info.run_delay; idx = srcu_read_lock(&kvm->srcu); kvm_write_guest(kvm, base, &init_values, sizeof(init_values)); srcu_read_unlock(&kvm->srcu, idx); kvm_write_guest_lock(kvm, base, &init_values, sizeof(init_values)); return base; } Loading arch/arm64/kvm/vgic/vgic-v4.c +12 −0 Original line number Diff line number Diff line Loading @@ -353,6 +353,18 @@ int vgic_v4_load(struct kvm_vcpu *vcpu) return err; } void vgic_v4_commit(struct kvm_vcpu *vcpu) { struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; /* * No need to wait for the vPE to be ready across a shallow guest * exit, as only a vcpu_put will invalidate it. */ if (!vpe->ready) its_commit_vpe(vpe); } static struct vgic_its *vgic_get_its(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *irq_entry) { Loading arch/arm64/kvm/vgic/vgic.c +3 −0 Original line number Diff line number Diff line Loading @@ -915,6 +915,9 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) if (can_access_vgic_from_kernel()) vgic_restore_state(vcpu); if (vgic_supports_direct_msis(vcpu->kvm)) vgic_v4_commit(vcpu); } void kvm_vgic_load(struct kvm_vcpu *vcpu) Loading drivers/irqchip/irq-gic-v3-its.c +8 −4 Original line number Diff line number Diff line Loading @@ -3842,8 +3842,6 @@ static void its_vpe_schedule(struct its_vpe *vpe) val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; val |= GICR_VPENDBASER_Valid; gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); its_wait_vpt_parse_complete(); } static void its_vpe_deschedule(struct its_vpe *vpe) Loading Loading @@ -3891,6 +3889,10 @@ static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) its_vpe_deschedule(vpe); return 0; case COMMIT_VPE: its_wait_vpt_parse_complete(); return 0; case INVALL_VPE: its_vpe_invall(vpe); return 0; Loading Loading @@ -4052,8 +4054,6 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe, val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); its_wait_vpt_parse_complete(); } static void its_vpe_4_1_deschedule(struct its_vpe *vpe, Loading Loading @@ -4128,6 +4128,10 @@ static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) its_vpe_4_1_deschedule(vpe, info); return 0; case COMMIT_VPE: its_wait_vpt_parse_complete(); return 0; case INVALL_VPE: its_vpe_4_1_invall(vpe); return 0; Loading Loading
Documentation/virt/kvm/arm/pvtime.rst +2 −2 Original line number Diff line number Diff line Loading @@ -19,8 +19,8 @@ Two new SMCCC compatible hypercalls are defined: These are only available in the SMC64/HVC64 calling convention as paravirtualized time is not available to 32 bit Arm guests. The existence of the PV_FEATURES hypercall should be probed using the SMCCC 1.1 ARCH_FEATURES mechanism before calling it. the PV_TIME_FEATURES hypercall should be probed using the SMCCC 1.1 ARCH_FEATURES mechanism before calling it. PV_TIME_FEATURES ============= ======== ========== Loading
arch/arm64/kvm/pvtime.c +1 −5 Original line number Diff line number Diff line Loading @@ -53,7 +53,6 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu) struct pvclock_vcpu_stolen_time init_values = {}; struct kvm *kvm = vcpu->kvm; u64 base = vcpu->arch.steal.base; int idx; if (base == GPA_INVALID) return base; Loading @@ -63,10 +62,7 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu) * the feature enabled. */ vcpu->arch.steal.last_steal = current->sched_info.run_delay; idx = srcu_read_lock(&kvm->srcu); kvm_write_guest(kvm, base, &init_values, sizeof(init_values)); srcu_read_unlock(&kvm->srcu, idx); kvm_write_guest_lock(kvm, base, &init_values, sizeof(init_values)); return base; } Loading
arch/arm64/kvm/vgic/vgic-v4.c +12 −0 Original line number Diff line number Diff line Loading @@ -353,6 +353,18 @@ int vgic_v4_load(struct kvm_vcpu *vcpu) return err; } void vgic_v4_commit(struct kvm_vcpu *vcpu) { struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; /* * No need to wait for the vPE to be ready across a shallow guest * exit, as only a vcpu_put will invalidate it. */ if (!vpe->ready) its_commit_vpe(vpe); } static struct vgic_its *vgic_get_its(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *irq_entry) { Loading
arch/arm64/kvm/vgic/vgic.c +3 −0 Original line number Diff line number Diff line Loading @@ -915,6 +915,9 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) if (can_access_vgic_from_kernel()) vgic_restore_state(vcpu); if (vgic_supports_direct_msis(vcpu->kvm)) vgic_v4_commit(vcpu); } void kvm_vgic_load(struct kvm_vcpu *vcpu) Loading
drivers/irqchip/irq-gic-v3-its.c +8 −4 Original line number Diff line number Diff line Loading @@ -3842,8 +3842,6 @@ static void its_vpe_schedule(struct its_vpe *vpe) val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; val |= GICR_VPENDBASER_Valid; gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); its_wait_vpt_parse_complete(); } static void its_vpe_deschedule(struct its_vpe *vpe) Loading Loading @@ -3891,6 +3889,10 @@ static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) its_vpe_deschedule(vpe); return 0; case COMMIT_VPE: its_wait_vpt_parse_complete(); return 0; case INVALL_VPE: its_vpe_invall(vpe); return 0; Loading Loading @@ -4052,8 +4054,6 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe, val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); its_wait_vpt_parse_complete(); } static void its_vpe_4_1_deschedule(struct its_vpe *vpe, Loading Loading @@ -4128,6 +4128,10 @@ static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) its_vpe_4_1_deschedule(vpe, info); return 0; case COMMIT_VPE: its_wait_vpt_parse_complete(); return 0; case INVALL_VPE: its_vpe_4_1_invall(vpe); return 0; Loading